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E-book: Non-Linear Feedback Neural Networks: VLSI Implementations and Applications

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This book aims to present a viable alternative to the Hopfield Neural Network (HNN) model for analog computation. It is well known the standard HNN suffers from problems of convergence to local minima, and requirement of a large number of neurons and synaptic weights. Therefore, improved solutions are needed. The non-linear synapse neural network (NoSyNN) is one such possibility and is discussed in detail in this book. This book also discusses the applications in computationally intensive tasks like graph coloring, ranking, and linear as well as quadratic programming. The material in the book is useful to students, researchers and academician working in the area of analog computation.

This book details the non-linear synapse neural network (NoSyNN). It also discusses the applications in computationally intensive tasks like graph coloring, ranking, and linear as well as quadratic programming.
1 Introduction
1(12)
1.1 Neural Networks
1(2)
1.2 Applications of Neural Networks
3(1)
1.3 Hardware for Neural Networks
4(2)
1.4 Outline of Contents
6(1)
1.5 Organization of the
Chapters
7(6)
References
8(5)
2 Background
13(42)
2.1 Hopfield Neural Network
13(7)
2.2 Nonlinear Synapse Neural Network
20(24)
2.2.1 Sorting of Numbers Using NOSYNN
25(10)
2.2.2 Graph Colouring Using NOSYNN
35(2)
2.2.3 Graph Coloring Using Modified Voltage-Mode NOSYNN
37(7)
2.3 Chosen Problems: Description and Applications
44(4)
2.3.1 System of Simultaneous Linear Equations
44(2)
2.3.2 Linear Programming Problem
46(1)
2.3.3 Quadratic Programming Problem
47(1)
2.4 Overview of Relevant Literature
48(2)
2.5 Summary
50(5)
References
51(4)
3 Voltage-Mode Neural Network for the Solution of Linear Equations
55(50)
3.1 Introduction
55(1)
3.2 Solving Linear Equations Using the Hopfield Neural Network
56(9)
3.2.1 The Hopfield Network
56(3)
3.2.2 Modified Hopfield Network for Solving Linear Equations
59(6)
3.3 NOSYNN-Based Neural Circuit for Solving Linear Equations
65(26)
3.3.1 Proof of the Energy Function
84(1)
3.3.2 Stable States of the Network
84(4)
3.3.3 Convergence of the Network
88(3)
3.4 Hardware Simulation Results
91(4)
3.5 Hardware Implementation
95(2)
3.6 Low-Voltage CMOS-Compatible Linear Equation Solver
97(4)
3.7 Comparison with Existing Works
101(1)
3.8 Discussion on VLSI Implementation Issues
102(1)
3.9 Conclusion
102(3)
References
103(2)
4 Mixed-Mode Neural Circuit for Solving Linear Equations
105(40)
4.1 Introduction
105(1)
4.2 Mixed-Mode Neural Network for Solving Linear Equations
106(18)
4.2.1 Proof of the Energy Function
120(1)
4.2.2 Stable States of the Network
121(3)
4.3 Hardware Simulation Results
124(5)
4.4 Digitally-Controlled DVCC
129(2)
4.5 DC-DVCC Based Linear Equation Solver
131(3)
4.6 Hardware Simulation Results
134(4)
4.7 Performance Evaluation
138(3)
4.8 VLSI Implementation Issues
141(2)
4.9 Conclusion
143(2)
References
143(2)
5 Non-Linear Feedback Neural Circuits for Linear and Quadratic Programming
145(26)
5.1 Introduction
145(2)
5.2 Non-Linear Feedback Neural Network for Linear Programming
147(10)
5.2.1 Hardware Simulation Results
153(4)
5.3 Non-Linear Feedback Neural Network for Solving QPP
157(4)
5.3.1 Simulation Results
160(1)
5.4 Discussion on Energy Function
161(2)
5.5 Issues in Actual Implementation
163(3)
5.6 Comparison with Existing Works
166(1)
5.7 Mixed-Mode Neural Circuits for LPP and QPP
167(3)
5.8 Conclusion
170(1)
References
170(1)
6 OTA-Based Implementations of Mixed-Mode Neural Circuits
171(16)
6.1 Introduction
171(2)
6.2 OTA-Based Linear Equation Solver
173(4)
6.3 Improved OTA-Based Linear Equation Solver
177(3)
6.4 OTA-Based Graph Colouring Neural Network
180(2)
6.5 OTA-Based Neural Network for Ranking
182(2)
6.6 Linear Programming Using OTAs
184(1)
6.7 OTA-Based QPP Solver
185(2)
References
185(2)
7 Conclusion
187(4)
7.1 Conclusion
187(1)
7.2 Further Reading
188(3)
References
189(2)
Appendix A Mixed-Mode Neural Network for Graph Colouring 191(4)
Appendix B Mixed-Mode Neural Network for Ranking 195(4)
About the Author 199
Dr. Mohammad Samar Ansari is an Assistant Professor of the Department of Electronics Engineering at Aligarh Muslim University, Aligarh, India. Before this he worked at the same university as a Lecturer and Guest Faculty from September 2004. Dr. Ansari also worked with Defense Research Development Organization (DRDO) and Siemens Limited during the years 20012003. He obtained PhD in 2012 (thesis title: Neural Circuits for Solving Linear Equations with Extensions for Mathematical Programming), and completed MTech (Electronics Engineering) in 2007 and BTech (Electronics Engineering) in 2001 from the same university. He has published 15 international journal papers and more than 30 international and national conference papers. He is a Life Member of The Institution of Electronics and Telecommunication Engineers (IETE), India.