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Part I Introduction and Preliminaries |
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3 | (8) |
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3 | (2) |
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1.2 Target of the Proposed Theory |
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5 | (1) |
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1.3 State of the Art---The Magnitude Optimum Criterion |
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6 | (2) |
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1.3.1 Type-I Control Loops |
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6 | (1) |
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1.3.2 Type-II Control Loops |
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7 | (1) |
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1.3.3 Type-III Control Loops |
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8 | (1) |
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1.4 Automatic Tuning of PID Controllers |
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8 | (3) |
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9 | (2) |
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2 Background and Preliminaries |
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11 | (20) |
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2.1 Definitions and Preliminaries |
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11 | (3) |
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2.2 Frequency Domain Modeling |
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14 | (1) |
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15 | (3) |
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18 | (1) |
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19 | (2) |
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2.6 Sensitivity and Complementary Sensitivity Function |
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21 | (2) |
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2.7 The Magnitude Optimum Design Criterion |
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23 | (3) |
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26 | (5) |
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27 | (4) |
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Part II Explicit Tuning of the PID Controller |
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31 | (54) |
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32 | (1) |
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3.2 Conventional PID Tuning Via the Magnitude Optimum Criterion |
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33 | (9) |
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34 | (1) |
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3.2.2 Preservation of the Shape of the Step and Frequency Response |
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35 | (2) |
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37 | (1) |
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38 | (3) |
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3.2.5 Drawbacks of the Conventional Tuning Method |
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41 | (1) |
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41 | (1) |
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3.3 Revised PID Tuning Via the Magnitude Optimum Criterion |
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42 | (4) |
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3.4 Performance Comparison Between Conventional and Revised PID Tuning |
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46 | (20) |
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3.4.1 Plant with One and Two Dominant Time Constants |
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46 | (1) |
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3.4.2 Plant with Five Dominant Time Constants |
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47 | (2) |
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3.4.3 A Pure Time Delay Process |
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49 | (2) |
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3.4.4 A Nonminimum Phase Process |
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51 | (1) |
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3.4.5 A Process with Large Zeros |
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51 | (2) |
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3.4.6 Comments on Pole-Zero Cancellation |
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53 | (2) |
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3.4.7 Comments on Disturbances Rejection |
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55 | (2) |
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3.4.8 Rejection of Output Disturbances |
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57 | (3) |
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3.4.9 Rejection of Input Disturbances |
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60 | (2) |
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3.4.10 Robustness to Model Uncertainties |
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62 | (4) |
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3.5 Performance Comparison Between Revised PID Tuning and Other Methods |
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66 | (10) |
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3.5.1 Internal Model Control |
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67 | (3) |
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3.5.2 Ziegler-Nichols Step Response Method |
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70 | (1) |
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71 | (5) |
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3.6 Explicit Tuning of PID Controllers Applied to Grid Converters |
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76 | (6) |
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3.6.1 Simplified Control Model and Parameters |
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77 | (5) |
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82 | (3) |
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83 | (2) |
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85 | (32) |
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85 | (3) |
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4.2 Conventional PID Tuning Via the Symmetrical Optimum Criterion |
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88 | (6) |
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88 | (2) |
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90 | (1) |
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90 | (4) |
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4.2.4 Drawbacks of the Conventional Tuning |
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94 | (1) |
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4.3 Revised PID Tuning Via the Symmetrical Optimum Criterion |
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94 | (4) |
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4.4 Performance Comparison Between Conventional and Revised PID Tuning |
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98 | (12) |
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4.4.1 Plant with One Dominant Time Constant |
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98 | (3) |
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4.4.2 Plant with Two Dominant Time Constants |
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101 | (2) |
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4.4.3 A Non-minimum Phase Process |
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103 | (3) |
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4.4.4 Plant with Long Time Delay |
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106 | (1) |
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4.4.5 Plant with Large Zeros |
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106 | (4) |
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4.5 DC Link Voltage Control on an AC/DC Converter-Type-II Control Loop |
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110 | (4) |
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4.5.1 Simplified Control Model and Parameters |
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111 | (1) |
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4.5.2 Modeling of the Control Loop in the Frequency Domain |
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111 | (3) |
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114 | (3) |
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114 | (3) |
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117 | (44) |
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117 | (2) |
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5.2 PID Tuning Rules for Type-III Control Loops |
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119 | (14) |
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5.2.1 Pole-Zero Cancellation Design |
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119 | (4) |
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5.2.2 Revised PID Tuning Rules |
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123 | (4) |
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127 | (6) |
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5.3 Explicit PID Tuning Rules for Type-p Control Loops |
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133 | (25) |
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5.3.1 Extending the Design to Type-p Control Loops |
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135 | (11) |
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146 | (8) |
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5.3.3 Robustness Performance |
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154 | (4) |
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158 | (3) |
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159 | (2) |
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161 | (38) |
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161 | (10) |
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6.1.1 Performance Comparison Between Analog and Digital Design in Type-I Control Loops |
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165 | (6) |
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6.2 Type-II Control Loops |
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171 | (8) |
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6.2.1 Performance Comparison Between Analog and Digital Design in Type-II Control Loops |
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174 | (5) |
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6.3 Type-III Control Loops |
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179 | (17) |
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6.3.1 Performance Comparison Between Analog and Digital Design in Type-III Control Loops |
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181 | (7) |
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6.3.2 Sampling Time Effect Investigation in Type-III Control Loops |
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188 | (8) |
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196 | (3) |
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196 | (3) |
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Part III Automatic Tuning of the PID Controller |
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7 Automatic Tuning of PID Regulators for Type-I Control Loops |
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199 | (44) |
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7.1 Why Automatic Tuning? |
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199 | (3) |
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7.2 The Algorithm of Automatic Tuning of PID Regulators |
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202 | (10) |
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7.2.1 Integral Control of the Approximate Plant |
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203 | (1) |
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7.2.2 Integral Control of the Real Plant |
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204 | (1) |
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7.2.3 Proportional-Integral Control |
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204 | (1) |
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7.2.4 Proportional-Integral-Derivative Control |
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205 | (1) |
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206 | (4) |
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7.2.6 Starting up the Procedure |
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210 | (2) |
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212 | (12) |
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7.3.1 Plant with One Dominant Time Constant |
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212 | (3) |
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7.3.2 Plant with Two Dominant Time Constants |
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215 | (1) |
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7.3.3 Plant with Dominant Time Constants and Time Delay |
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216 | (2) |
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7.3.4 Plant with Dominant Time Constants, Zeros, and Time Delay |
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218 | (3) |
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7.3.5 A Nonminimum Phase Plant with Time Delay |
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221 | (3) |
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7.4 Automatic Tuning for Processes with Conjugate Complex Poles |
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224 | (12) |
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7.4.1 Direct Tuning of the PID Controller for Processes with Conjugate Complex Poles |
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225 | (3) |
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7.4.2 Automatic Tuning of the PID Controller for Processes with Conjugate Complex Poles |
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228 | (6) |
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7.4.3 Simulation Examples |
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234 | (2) |
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236 | (7) |
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240 | (3) |
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8 Changes on the Current State of the Art |
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243 | (6) |
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8.1 The Magnitude Optimum Criterion---Present and Future of PID Control |
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243 | (4) |
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8.2 Open Issues and Future Work |
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247 | (2) |
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247 | (2) |
Appendix A The Magnitude Optimum Criterion |
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249 | (4) |
Appendix B Analog Design-Proof of the Optimal Control Law |
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253 | (16) |
Appendix C Digital Design-Proof of the Optimal Control Law |
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269 | (24) |
Index |
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293 | |