Artificial intelligence has already enabled pivotal advances in diverse fields, yet its impact on computer architecture has only just begun. In particular, recent work has explored broader application to the design, optimization, and simulation of computer architecture. Notably, machine-learning-based strategies often surpass prior state-of-the-art analytical, heuristic, and human-expert approaches. This book reviews the application of machine learning in system-wide simulation and run-time optimization, and in many individual components such as caches/memories, branch predictors, networks-on-chip, and GPUs. The book further analyzes current practice to highlight useful design strategies and identify areas for future work, based on optimized implementation strategies, opportune extensions to existing work, and ambitious long term possibilities. Taken together, these strategies and techniques present a promising future for increasingly automated computer architecture designs.
Preface.- Acknowledgments.- Introduction.- Basics of Machine Learning in Architecture.- Literature Review.- Case Studies.- Analysis of Current Practice.- Future Directions of AI\nobreakspace {.- Conclusions.- Bibliography.- Authors' Biographies.
Lizhong Chen is an Associate Professor in the School of Electrical Engineering and Computer Science at Oregon State University. He received his Ph.D. in Computer Engineering and M.S. in Electrical Engineering from the University of Southern California in 2014 and 2011, respectively, and B.S. in Electrical Engineering from Zhejiang University in 2009. His research interests are in the board area of computer architecture, interconnection networks, GPUs, machine learning, hardware accelerators, and emerging IoT technologies. Dr. Chen is the recipient of National Science Foundation (NSF) CAREER Award, several Best Paper Awards/Nominations at major architecture conferences, Chu Kochen Award (the highest honor from Zhejiang University), and an inductee of the HPCA Hall of Fame. He is also the founder and organizer of the Annual International Workshop on AI-assisted Design for Architecture (AIDArc), held in conjunction with ISCA. Dr. Chen is currently serving on the editorial board of IEEE Transactions on Computers (TC) and, in the past, has served as a program committee member in major computer architecture conferences (e.g., ISCA, HPCA, MICRO, DAC, ICS, IPDPS, IISWC), reviewer for several IEEE and ACM journals (e.g., TC, TPDS, TVLSI, TCAD, TACO), and panelist of multiple NSF panels related to computer systems architecture. He is a Senior Member of IEEE and ACM.Drew Penney is currently a Ph.D. student at Oregon State University and is a member of the System Technology and Architecture Research (STAR) Lab, directed by Dr. Lizhong Chen. At the STAR Lab, Drew explores novel machine learning applications to diverse architectural designs. He received his Bachelors degree in Electrical and Computer Engineering (Summa Cum Laude) from Oregon State University and was a Deans Scholar. He has published several papers on AI in computer architecture, was an invited guest speaker at a workshop on AI-assisted Design for Architecture (AIDArc), and received the Best Paper Runner-upAward in HPCA 2020 for his work on deep reinforcement learning in network-on-chip design.Daniel Jiménez is a Professor in the Department of Computer Science and Engineering at Texas A&M University. He was previously Assistant and later Associate Professor in the Department of Computer Science at Rutgers University, and Professor and Chair of the Department of Computer Science at UT San Antonio. Dr. Jiménez received his Ph.D. in Computer Sciences from UT Austin in 2002. He is interested in characterizing and exploiting the predictability of programs to improve microarchitecture. He pioneered the development of neural-inspired branch predictors, which have been implemented in microprocessors from AMD, Oracle, and Samsung. Dr. Jiménez designed the neural branch predictor for the Samsung Exynos M1 which is used in the popular Samsung Galaxy S7. He is a Senior Member of the IEEE, an ACM Distinguished Scientist, an NSF CAREER award winner, and member of the HPCA and MICRO halls of fame. He was the General Chair of IEEE HPCA in 2011, Program Chair for IEEE HPCA in 2017, and Chair of IEEE Technical Committee on Computer Architecture (TCCA) in 2018.
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