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E-raamat: Automated Design of Analog and High-frequency Circuits: A Computational Intelligence Approach

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Automated Design of Analog and High-frequency Circuits: A Computational Intelligence ApproachSuurem pilt
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Computational intelligence techniques are becoming more and more important for automated problem solving nowadays. Due to the growing complexity of industrial applications and the increasingly tight time-to-market requirements, the time available for thorough problem analysis and development of tailored solution methods is decreasing. There is no doubt that this trend will continue in the foreseeable future. Hence, it is not surprising that robust and general automated problem solving methods with satisfactory performance are needed.

This book features recent research on computational intelligence techniques for the automated design of analog and high-frequency circuits. It will help readers handle state-of-the-art algorithms and even design their own methods.
1 Basic Concepts and Background
1(18)
1.1 Introduction
1(4)
1.2 An Introduction into Computational Intelligence
5(4)
1.2.1 Evolutionary Computation
5(2)
1.2.2 Fuzzy Logic
7(2)
1.2.3 Machine Learning
9(1)
1.3 Fundamental Concepts in Optimization
9(2)
1.4 Design and Computer-Aided Design of Analog/RF IC
11(4)
1.4.1 Overview of Analog/RF Circuit and System Design
11(2)
1.4.2 Overview of the Computer-Aided Design of Analog/RF ICs
13(2)
1.5 Summary
15(1)
References
16(3)
2 Fundamentals of Optimization Techniques in Analog IC Sizing
19(22)
2.1 Analog IC Sizing: Introduction and Problem Definition
19(2)
2.2 Review of Analog IC Sizing Approaches
21(2)
2.3 Implementation of Evolutionary Algorithms
23(4)
2.3.1 Overview of the Implementation of an EA
23(1)
2.3.2 Differential Evolution
24(3)
2.4 Basics of Constraint Handling Techniques
27(2)
2.4.1 Static Penalty Functions
27(1)
2.4.2 Selection-Based Constraint Handling Method
28(1)
2.5 Multi-objective Analog Circuit Sizing
29(5)
2.5.1 NSGA-II
29(3)
2.5.2 MOEA/D
32(2)
2.6 Analog Circuit Sizing Examples
34(4)
2.6.1 Folded-Cascode Amplifier
34(1)
2.6.2 Single-Objective Constrained Optimization
34(2)
2.6.3 Multi-objective Optimization
36(2)
2.7 Summary
38(1)
References
39(2)
3 High-Performance Analog IC Sizing: Advanced Constraint Handling and Search Methods
41(22)
3.1 Challenges in Analog Circuit Sizing
41(1)
3.2 Advanced Constrained Optimization Techniques
42(5)
3.2.1 Overview of the Advanced Constraint Handling Techniques
42(2)
3.2.2 A Self-Adaptive Penalty Function-Based Method
44(3)
3.3 Hybrid Methods
47(3)
3.3.1 Overview of Hybrid Methods
47(1)
3.3.2 Popular Hybridization and Memetic Algorithm for Numerical Optimization
48(2)
3.4 MSOEA: A Hybrid Method for Analog IC Sizing
50(11)
3.4.1 Evolutionary Operators
50(3)
3.4.2 Constraint Handling Method
53(1)
3.4.3 Scaling Up of MSOEA
53(3)
3.4.4 Experimental Results of MSOEA
56(5)
3.5 Summary
61(1)
References
61(2)
4 Analog Circuit Sizing with Fuzzy Specifications: Addressing Soft Constraints
63(22)
4.1 Introduction
63(1)
4.2 The Motivation of Analog Circuit Sizing with Imprecise Specifications
64(2)
4.2.1 Why Imprecise Specifications Are Necessary
64(1)
4.2.2 Review of Early Works
65(1)
4.3 Design of Fuzzy Numbers
66(2)
4.4 Fuzzy Selection-Based Constraint Handling Methods (Single-Objective)
68(2)
4.5 Single-Objective Fuzzy Analog IC Sizing
70(5)
4.5.1 Fuzzy Selection-Based Differential Evolution Algorithm
70(1)
4.5.2 Experimental Results and Comparisons
71(4)
4.6 Multi-objective Fuzzy Analog Sizing
75(6)
4.6.1 Multi-objective Fuzzy Selection Rules
76(2)
4.6.2 Experimental Results for Multi-objective Fuzzy Analog Circuit Sizing
78(3)
4.7 Summary
81(1)
References
82(3)
5 Process Variation-Aware Analog Circuit Sizing: Uncertain Optimization
85(22)
5.1 Introduction to Analog Circuit Sizing Considering Process Variations
85(5)
5.1.1 Why Process Variations Need to be Taken into Account in Analog Circuit Sizing
85(1)
5.1.2 Yield Optimization, Yield Estimation and Variation-Aware Sizing
86(2)
5.1.3 Traditional Methods for Yield Optimization
88(2)
5.2 Uncertain Optimization Methodologies
90(2)
5.3 The Pruning Method
92(1)
5.4 Advanced MC Sampling Methods
93(10)
5.4.1 AYLeSS: A Fast Yield Estimation Method for Analog IC
95(4)
5.4.2 Experimental Results of AYLeSS
99(4)
5.5 Summary
103(1)
References
103(4)
6 Ordinal Optimization-Based Methods for Efficient Variation-Aware Analog IC Sizing
107(26)
6.1 Ordinal Optimization
108(2)
6.2 Efficient Evolutionary Search Techniques
110(3)
6.2.1 Using Memetic Algorithms
110(1)
6.2.2 Using Modified Evolutionary Search Operators
111(2)
6.3 Integrating OO and Efficient Evolutionary Search
113(3)
6.4 Experimental Methods and Verifications of ORDE
116(3)
6.4.1 Experimental Methods for Uncertain Optimization with MC Simulations
116(1)
6.4.2 Experimental Verifications of ORDE
117(2)
6.5 From Yield Optimization to Single-Objective Analog Circuit Variation-Aware Sizing
119(3)
6.5.1 ORDE-Based Single-Objective Variation-Aware Analog Circuit Sizing
120(1)
6.5.2 Example
121(1)
6.6 Bi-objective Variation-Aware Analog Circuit Sizing
122(8)
6.6.1 The MOOLP Algorithm
123(5)
6.6.2 Experimental Results
128(2)
6.7 Summary
130(1)
References
130(3)
7 Electromagnetic Design Automation: Surrogate Model Assisted Evolutionary Algorithm
133(20)
7.1 Introduction to Simulation-Based Electromagnetic Design Automation
134(1)
7.2 Review of the Traditional Methods
135(4)
7.2.1 Integrated Passive Component Synthesis
135(2)
7.2.2 RF Integrated Circuit Synthesis
137(1)
7.2.3 Antenna Synthesis
138(1)
7.3 Challenges of Electromagnetic Design Automation
139(1)
7.4 Surrogate Model Assisted Evolutionary Algorithms
140(2)
7.5 Gaussian Process Machine Learning
142(5)
7.5.1 Gaussian Process Modeling
143(1)
7.5.2 Discussions of GP Modeling
144(3)
7.6 Artificial Neural Networks
147(1)
7.7 Summary
148(1)
References
149(4)
8 Passive Components Synthesis at High Frequencies: Handling Prediction Uncertainty
153(32)
8.1 Individual Threshold Control Method
154(4)
8.1.1 Motivations and Algorithm Structure
154(1)
8.1.2 Determination of the MSE Thresholds
155(3)
8.2 The GPDECO Algorithm
158(3)
8.2.1 Scaling Up of GPDECO
158(2)
8.2.2 Experimental Verification of GPDECO
160(1)
8.3 Prescreening Methods
161(4)
8.3.1 The Motivation of Prescreening
161(2)
8.3.2 Widely Used Prescreening Methods
163(2)
8.4 MMLDE: A Hybrid Prescreening and Prediction Method
165(8)
8.4.1 General Overview
165(1)
8.4.2 Integrating Surrogate Models into EA
166(2)
8.4.3 The General Framework of MMLDE
168(1)
8.4.4 Experimental Results of MMLDE
169(4)
8.5 SAEA for Multi-objective Expensive Optimization and Generation Control Method
173(3)
8.5.1 Overview of Multi-objective Expensive Optimization Methods
174(1)
8.5.2 The Generation Control Method
175(1)
8.6 Handling Multiple Objectives in SAEA
176(6)
8.6.1 The GPMOOG Method
177(3)
8.6.2 Experimental Result
180(2)
8.7 Summary
182(1)
References
182(3)
9 mm-Wave Linear Amplifier Design Automation: A First Step to Complex Problems
185(16)
9.1 Problem Analysis and Key Ideas
186(4)
9.1.1 Overview of EMLDE
186(1)
9.1.2 The Active Components Library and the Look-up Table for Transmission Lines
187(1)
9.1.3 Handling Cascaded Amplifiers
188(1)
9.1.4 The Two Optimization Loops
188(2)
9.2 Naive Bayes Classification
190(1)
9.3 Key Algorithms in EMLDE
191(2)
9.3.1 The ABGPDE Algorithm
191(2)
9.3.2 The Embedded SBDE Algorithm
193(1)
9.4 Scaling Up of the EMLDE Algorithm
193(2)
9.5 Experimental Results
195(4)
9.5.1 Example Circuit
195(2)
9.5.2 Three-Stage Linear Amplifier Synthesis
197(2)
9.6 Summary
199(1)
References
199(2)
10 mm-Wave Nonlinear IC and Complex Antenna Synthesis: Handling High Dimensionality
201
10.1 Main Challenges for the Targeted Problem and Discussions
202(2)
10.2 Dimension Reduction
204(2)
10.2.1 Key Ideas
204(2)
10.2.2 GP Modeling with Dimension Reduction Versus Direct GP Modeling
206(1)
10.3 The Surrogate Model-Aware Search Mechanism
206(4)
10.4 Experimental Tests on Mathematical Benchmark Problems
210(9)
10.4.1 Test Problems
210(1)
10.4.2 Performance and Analysis
210(9)
10.5 60 GHz Power Amplifier Synthesis by GPEME
219(4)
10.6 Complex Antenna Synthesis with GPEME
223(9)
10.6.1 Example 1: Microstrip-fed Crooked Cross Slot Antenna
225(3)
10.6.2 Example 2: Inter-chip Wireless Antenna
228(2)
10.6.3 Example 3: Four-element Linear Array Antenna
230(2)
10.7 Summary
232(2)
References
234
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