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E-raamat: Beginning FPGA: Programming Metal: Your brain on hardware

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  • Formaat: PDF+DRM
  • Ilmumisaeg: 23-Dec-2016
  • Kirjastus: APress
  • Keel: eng
  • ISBN-13: 9781430262480
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Beginning FPGA: Programming Metal: Your brain on hardwareSuurem pilt
  • Formaat: PDF+DRM
  • Ilmumisaeg: 23-Dec-2016
  • Kirjastus: APress
  • Keel: eng
  • ISBN-13: 9781430262480
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If you've already tinkered a bit with Arduino or Raspberry Pi, and you want to get more hands-on with hardware, or even if you're completely new to electronics and you just want to dive in, then Beginning FPGA is the book you need.

You don't need an electronics engineering degree or even any programming experience to get the most out of Beginning FPGA. Just bring your curiosity and your FPGA. In this book, you'll be using the MicroNova Mercury, a very affordable and breadboard-friendly FPGA development board.

FPGA stands for Field-Programmable Gate Array. It's an integrated circuit waiting for you to tell it what to become. Unlike a microcontroller board like the Arduino, you don't really "program" an FPGA and tell it what to do; instead you use a hardware description language to tell it what to be.

And what can it be? It can be just about anything you can imagine! In this book you'll use it to create a pressure sensor, an air quality sensor, and just for fun, the KITT car display from Knight Rider (or Cylon eyes if you prefer to think of it that way). You'll also learn how to make your FPGA talk to a Raspberry Pi.

Along the way, you'll learn the theory behind FPGAs and electronics, including the math and logic you need to understand what's happening - all explained in a fun, friendly, and accessible way. It also doesn't hurt that you'll be learning VHDL, a hardware description languae that is also an extremely marketable skill.

About the Authors xiii
About the Technical Reviewer xv
Part I Getting Started with FPGA
1(104)
Chapter 1 What is an FPGA and What Can It Do?
3(10)
1.1 Field-Programmable
4(1)
1.1.1 Configuration Technology
4(1)
1.2 Gates = Logic
5(3)
1.2.1 The Basic Gate Design Block No. 1: Logic Element
5(3)
1.2.2 The Basic Gate Design Block No. 2: Configurable IO Block
8(1)
1.2.3 The Basic Gate Design Block No. 3: Internal RAM
8(1)
1.3 Arrays Have Many Connections
8(1)
1.4 What Can It Do?
9(1)
1.5 It Can Get the Job Done Fast!
10(1)
1.6 FPGA vs. Processor
11(1)
1.7 Summary
12(1)
Chapter 2 Our Weapon of Choice
13(10)
2.1 What Weapons (FPGAs) Are Available
13(1)
2.2 The BeMicro Max 10: Our Weapon of Choice
14(4)
2.2.1 The Master: Altera MAX 10 FPGA
15(2)
2.2.2 The Emissaries: BeMicro MAX 10 Board Features
17(1)
2.3 Other Tools
18(3)
2.3.1 The Place to Connect Everything: The Breadboard
19(1)
2.3.2 Making the Invisible Visible: The Multi-meter
20(1)
2.4 Wrap-up
21(2)
Chapter 3 Lock and Load
23(24)
3.1 Getting the Development Toolchain Up and Running
23(1)
3.2 Downloading Altera Tools
24(9)
3.2.1 Altera Toolchains
25(1)
3.2.2 Create an Altera Account
25(1)
3.2.3 Download the Altera Toolchains
26(7)
3.3 Install Altera Quartus Prime Lite Edition
33(11)
3.4 Download BeMicro10 files and Documentation
44(1)
3.5 Summary
45(2)
Chapter 4 Hello World!
47(58)
4.1 Launch Quartus Prime and Create a New Project
47(14)
4.2 Write Code
61(8)
4.3 Implement Design
69(6)
4.4 Simulate Design
75(14)
4.5 Burn It!
89(8)
4.5.1 Install USB Blaster Driver
89(3)
4.5.2 Program Design
92(5)
4.6 Recapping What We Just Completed
97(6)
4.6.1 Timing constraints
97(1)
4.6.2 The Implementation
97(4)
4.6.3 The Test Bench
101(2)
4.7 Summary
103(2)
4.7.1 But I Don't have a Mercury Module!
103(2)
Part II Time Out for Theory
105(114)
Chapter 5 FPGA Development Timeline
107(10)
5.1 1847---First Theory---Boolean Logic
107(1)
5.2 1935---First Boolean Logic in Real World
107(1)
5.3 1942---First Electronic Digital Computer
107(1)
5.4 1960---First MOSFET
108(1)
5.5 1960---First Practical Commercial Logic IC Module
109(1)
5.6 1962---First Standard Logic ICs Family
110(1)
5.7 1963---First CMOS
110(1)
5.8 1964---First SRAM
110(1)
5.9 1965---The Well-Known Law: Moore's Law
110(1)
5.10 1970---First PROM
111(1)
5.11 1971---First EPROM
111(1)
5.12 1975---First F-PLA
111(1)
5.13 1978---First PAL
111(1)
5.14 1983---First EEPROM
111(1)
5.15 1983---First GAL
111(1)
5.16 1983---First Programming Language/Tools for Hardware
112(1)
5.17 1985---First FPGA by Xilinx
112(1)
5.18 FPGA vs. ASIC
112(2)
5.18.1 FPGA Advantages
112(1)
5.18.2 FPGA Disadvantages
113(1)
5.18.3 ASIC Advantages
113(1)
5.18.4 ASIC Disadvantages
114(1)
5.19 Other Technology
114(1)
5.19.1 CPLD
114(1)
5.19.2 Cypress-PSoC
114(1)
5.20 Summary
115(2)
Chapter 6 VHDL 101
117(8)
6.1 It is not Another Computer Language
117(1)
6.2 VHDL File Basic Structure
118(5)
6.2.1 Entity Declaration
118(1)
6.2.2 Architecture Body
119(4)
6.3 Summary
123(2)
Chapter 7 Number Theory for FPGAs
125(12)
7.1 Vocabulary in VHDL
125(9)
7.1.1 Identifiers
125(1)
7.1.2 Reserved Words---Keywords
126(2)
7.1.3 Signal, Variable, and Constant
128(4)
7.1.4 Literal: Word for Word
132(2)
7.2 Grammar in VHDL
134(1)
7.2.1 Statements in VHDL
134(1)
7.2.2 How to Comment
134(1)
7.2.3 <= and := sign
134(1)
7.2.4 Begin and End
134(1)
7.2.5 Coding Your VHDL with Style
135(1)
7.3 Summary
135(2)
Chapter 8 Telling the Truth: Boolean Algebra and Truth Tables
137(22)
8.1 Boolean Algebra
137(13)
8.1.1 Simulation Steps for Boolean Algebra Example 2
139(10)
8.1.2 Truth Tables
149(1)
8.2 Standard Logic in VHDL
150(7)
8.2.1 Standard Logic Data Types
151(1)
8.2.2 4-Bit Adder Examples with Standard Logic Types
151(6)
8.3 Combinational Logic Design in FPGA
157(1)
8.4 Summary
158(1)
Chapter 9 Simplifying Boolean Algebra for FPGA
159(12)
9.1 Concurrent Statements
162(1)
9.2 Conditional Signal Assignment---When/Else
162(2)
9.3 Select Signal Assignment---With/Select
164(3)
9.4 Process with Case Statement
167(3)
9.5 Summary
170(1)
Chapter 10 Sequential Logic: IF This, THEN That
171(20)
10.1 IF Statement
171(16)
10.1.1 D Flip-Flops with Clear and Preset
172(6)
10.1.2 Shift Registers
178(3)
10.1.3 4-Bit Up Counter Design Example
181(6)
10.2 More Than Sequential Logic---Sequential Statements
187(2)
10.3 VHDL Architecture Review
189(1)
10.4 Summary
190(1)
Chapter 11 Combinatorial Logic: Putting It All Together on the FPGA
191(28)
11.1 Introduction
191(1)
11.2 First FSM Example---4-Bit Up Counter
192(7)
11.2.1 Using Altera Quartus to Understand the FSM
196(3)
11.3 Combinational Lock Example
199(16)
11.3.1 Set Key Sequences
200(1)
11.3.2 Unlock Sequences
200(1)
11.3.3 Code for the Combinational Lock Design
201(5)
11.3.4 Simulate the Combinational Lock with ModelSim Script
206(9)
11.4 A Little Bit More About FSM in Digital Design
215(1)
11.5 Wrap-up
216(3)
11.5.1 Review FSMs
217(2)
Part III Let's Make Something!
219(126)
Chapter 12 Light Sensors: Turning a Laser Pointer into a Hi-Tech Tripwire
221(46)
12.1 Introduction
221(1)
12.2 Photo Resistor Circuit 101
222(1)
12.3 BeMicro MAX10 LED Circuit
222(2)
12.4 FPGA IP---Altera ADC IP (Hard IP and Soft IP)
224(9)
12.4.1 Hart IP
225(1)
12.4.2 Soft IP
225(1)
12.4.3 How to Configure Your First IP
226(7)
12.5 FPGA IP---Altera PLL IP
233(7)
12.5.1 Generate ADC PLL IP
233(4)
12.5.2 Generate Cascade PLL IP
237(3)
12.6 Hi-Tech Tripwire Design Example
240(25)
12.6.1 Light Sensor ADC Sequencer Module
241(3)
12.6.2 Light Sensor Counter LED
244(5)
12.6.3 Light Sensor Top Level
249(4)
12.6.4 Add All Files to the Project and Create the Tripwire Device
253(5)
12.6.5 Program the Tripwire Design to the FPGA
258(7)
12.7 Summary
265(2)
Chapter 13 Temperature Sensors: Is it Hot in Here, or is it Just Me?
267(46)
13.1 Introduction
267(2)
13.2 UART with Control Memory Map
269(5)
13.2.1 UART IP
270(2)
13.2.2 UART PC Software
272(2)
13.3 I2C Communication
274(6)
13.3.1 Basic I2C
274(1)
13.3.2 I2C Master
274(2)
13.3.3 Temperature Sensor---Analog Device ADT7420
276(2)
13.3.4 I2C Slave
278(2)
13.4 FPGA IP---Altera PLL IP
280(2)
13.5 PC Control Temperature Sensor Design Example
282(29)
13.5.1 Define What Needs to Be Done---Command and Status Registers
284(1)
13.5.2 Example Design Codes
285(7)
13.5.3 Example Simulation Codes
292(5)
13.5.4 Create Temperature Sensor Project Design and Program It
297(8)
13.5.5 Hardware Setup for the Temperature Sensor Project Design
305(1)
13.5.6 UART Software Setup---RealTerm
305(2)
13.5.7 Command Your FPGA to Read the Temperature
307(4)
13.6 Summary
311(2)
Chapter 14 How Fast Can You Run? Ask the Accelerometer!
313(32)
14.1 Introduction
313(1)
14.2 Steps to Build Your First Interface Module
314(8)
14.2.1 Understanding the SPI
314(1)
14.2.2 What Do You Need for an SPI Master Module?
314(2)
14.2.3 Create the SPI Master Module Entity Port List
316(2)
14.2.4 Create Processes in VHDL for the Requirements
318(4)
14.3 PC Control Accelerometer Sensor Design Example
322(21)
14.3.1 Add New Command and Status Registers
324(2)
14.3.2 Create the Temperature Sensor Project Design and Program It
326(1)
14.3.3 Example Design Codes
326(12)
14.3.4 Hardware Setup for the Accelerator Sensor Project Design
338(1)
14.3.5 Initialize the Accelerometer---ADXL362
338(5)
14.4 Summary
343(2)
Part IV Taking It Further: Talking to the Raspberry Pi and LED Displays
345(36)
Chapter 15 Two-Way Communications with Your Raspberry Pi: SPI
347(20)
15.1 Introduction
347(1)
15.2 Define Our SPI Slave Interface for the Raspberry Pi
347(2)
15.3 Design SPI Slave in FPGA
349(11)
15.3.1 New SPI Slave Module Port List
350(1)
15.3.2 Raspberry Pi SPI Master 0 Default Setting and Data Format
351(1)
15.3.3 Writing VHDL for the SPI Slave
352(8)
15.4 Create the FPGA Top-Level Design
360(5)
15.4.1 Top-Level Design VHDL Code
361(2)
15.4.2 Generate and Program the FPGA
363(2)
15.5 How to Use Raspberry Pi SPI Master Interface
365(1)
15.5.1 Python Code to Read and Write SPI Master
365(1)
15.6 Summary
366(1)
Chapter 16 Up in Lights: How to Drive LED Segment Displays
367(14)
16.1 Introduction
367(1)
16.2 How to drive a 7 segment display
367(4)
16.2.1 Connecting 7 segment display to FPGA
368(3)
16.3 Designing the 7 segment display counter
371(4)
16.3.1 Simple counter design section
372(2)
16.3.2 7 segment decoder section
374(1)
16.3.3 End of the counter design
374(1)
16.4 7 Segment display example design
375(3)
16.4.1 Code for the top level design
375(3)
16.4.2 Generate and program the FPGA
378(1)
16.5 Control the 7 segment counter from Raspberry Pi
378(1)
16.6 Summary
379(2)
Index 381
Aiken Pang was born in Hong Kong in the early 80s just in time for the home micro-computer revolution. He developed an interest in computers after finding an Apple IIe at his uncle's home, installing a TV card, floppy drive and loaded his first game (Pacman) by himself at the age of 10. Since then he has  taught himself a number of programming languages and built his own computers from scratch.

Aiken followed his passion for computing into more formal studies and holds a BEng in Electronics Engineering and an MSc in Computer Engineering from the Hong Kong Polytechnic University and the University of Massachusetts at Lowell respectively. He has been using VHDL to design hardware in FPGAs for over 10 years.

He lives in the USA with his wife France and their daughter Mayah.
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