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E-raamat: CMOS Integrated Capacitive DC-DC Converters

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CMOS Integrated Capacitive DC-DC ConvertersSuurem pilt
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This book provides a detailed analysis of all aspects of capacitive DC-DC converter design: topology selection, control loop design and noise mitigation. It introduces a number of techniques to unleash the full potential of this design.

This book provides a detailed analysis of all aspects of capacitive DC-DC converter design: topology selection, control loop design and noise mitigation. Readers will benefit from the authors’ systematic overview that starts from the ground up, in-depth circuit analysis and a thorough review of recently proposed techniques and design methodologies. Not only design techniques are discussed, but also implementation in CMOS is shown, by pinpointing the technological opportunities of CMOS and demonstrating the implementation based on four state-of-the-art prototypes.
1 Introduction
1(38)
1.1 System-on-Chip Power Management
3(4)
1.1.1 Power Density
4(1)
1.1.2 Voltage Gap
5(1)
1.1.3 Energy Gap
6(1)
1.2 Power-Management Techniques
7(7)
1.2.1 Power Consumption in CMOS
7(2)
1.2.2 Clock Gating
9(1)
1.2.3 Voltage and Frequency Scaling
10(2)
1.2.4 Adaptive Voltage Body Biasing
12(1)
1.2.5 Analysis
13(1)
1.3 DC-DC Voltage Conversion
14(14)
1.3.1 Definition
14(1)
1.3.2 Requirements and Characteristics
15(5)
1.3.3 Linear Series Conversion
20(1)
1.3.4 Capacitive Conversion
21(4)
1.3.5 Inductive Conversion
25(2)
1.3.6 Analysis
27(1)
1.4 State-of-the-Art Integrated Converters
28(8)
1.4.1 Inductive Converters
28(3)
1.4.2 Capacitive Converters
31(2)
1.4.3 Figures of Merit
33(1)
1.4.4 Analysis
34(2)
1.5 Summary and Outline
36(1)
1.6 Conclusion
36(3)
2 Converter Topologies and Fundamentals
39(26)
2.1 Characteristics
39(4)
2.1.1 DC-DC Converter Structure
39(1)
2.1.2 Principles
40(1)
2.1.3 Example: The Series-Parallel 1/2 Converter
41(2)
2.2 Analysis Techniques
43(7)
2.2.1 Charge Flow Analysis
44(1)
2.2.2 Charge Balance Analysis
45(2)
2.2.3 Branch Analysis
47(3)
2.3 Topologies: Taxonomy
50(9)
2.3.1 Topology Occurrence Theorem
51(1)
2.3.2 Up Converters
52(3)
2.3.3 Down Converters
55(3)
2.3.4 Multi-Topology Converters
58(1)
2.4 Topologies: Analysis
59(5)
2.4.1 Dickson Converter
60(1)
2.4.2 Voltage Doubler
61(1)
2.4.3 Voltage Divider
62(1)
2.4.4 Fractional Converter
63(1)
2.5 Conclusion
64(1)
3 Modeling and Design of Capacitive DC-DC Converters
65(26)
3.1 Output Impedance Model
65(4)
3.2 Design of Single-Topology Single-Operation-Point Converters
69(8)
3.2.1 Implementation Parameters
69(2)
3.2.2 Output Impedance Requirements
71(1)
3.2.3 Output Impedance Balance
72(1)
3.2.4 Parameter Substitution
73(1)
3.2.5 Loss Analysis
74(1)
3.2.6 Loss Minimization
75(1)
3.2.7 Analysis
76(1)
3.3 Design of Multi-Topology Converters
77(5)
3.3.1 Model Refinement
78(2)
3.3.2 Optimization Space
80(2)
3.3.3 Multi-Objective Optimization
82(1)
3.4 Accuracy Improvement
82(8)
3.4.1 Conventional Model
83(1)
3.4.2 Modified Model
83(4)
3.4.3 Cases
87(2)
3.4.4 Measurements
89(1)
3.5 Conclusion
90(1)
4 Noise Reduction by Multi-Phase Interleaving and Fragmentation
91(20)
4.1 Noise in Systems on Chip
91(2)
4.2 Noise Characteristics
93(6)
4.2.1 Noise in the Slow Switching Limit
93(3)
4.2.2 Noise in the Fast Switching Limit
96(1)
4.2.3 Additional Noise Sources
97(2)
4.3 Noise Power Loss
99(3)
4.3.1 Analog Point-of-View
99(2)
4.3.2 Digital Point-of-View
101(1)
4.4 Noise Mitigation Techniques
102(8)
4.4.1 Series Regulator
102(2)
4.4.2 Multi-Phase Interleaving
104(4)
4.4.3 Capacitance Modulation by Means of Fragmentation
108(2)
4.5 Conclusion
110(1)
5 Control of Fully Integrated Capacitive Converters
111(30)
5.1 Control Nature
111(2)
5.2 Frequency-Domain Analysis
113(5)
5.2.1 Frequency-Domain Analysis in FSL
113(4)
5.2.2 Frequency-Domain Analysis in SSL
117(1)
5.3 Techniques
118(12)
5.3.1 Topology Reconfiguration
119(2)
5.3.2 Capacitance Modulation
121(2)
5.3.3 Pulse-Width Modulation
123(1)
5.3.4 Pulse-Frequency Modulation
124(6)
5.4 Implementations
130(8)
5.4.1 Lead Compensation
130(3)
5.4.2 Lead Compensation for Multi-Phase Converters
133(1)
5.4.3 Hysteretic Discrete-Time Control
133(1)
5.4.4 Multi-Phase Hysteretic Discrete-Time Control
134(4)
5.5 Conclusions
138(3)
6 Monolithic Integration of DC-DC Converters in CMOS
141(18)
6.1 Technology Framework
141(1)
6.2 Solid-State Switches
142(9)
6.2.1 Operation Regions
142(2)
6.2.2 Transistor Flavors
144(2)
6.2.3 Parasitic Elements
146(2)
6.2.4 Dealing with Voltage Limitations
148(3)
6.3 Passive Devices
151(7)
6.3.1 Fundamentals
151(1)
6.3.2 Metal-Oxide-Metal Capacitors
152(1)
6.3.3 Metal-Insulator-Metal Capacitors
153(1)
6.3.4 Metal-Oxide-Semiconductor Capacitors
153(4)
6.3.5 Technology Assessment
157(1)
6.4 Conclusion
158(1)
7 DC-DC Converter Prototypes
159(42)
7.1 Multi-Phase High-Efficiency Voltage Doubler
159(6)
7.1.1 Introduction
159(1)
7.1.2 Summary
160(1)
7.1.3 Converter Structure
160(1)
7.1.4 System
161(2)
7.1.5 Measurement Results
163(2)
7.1.6 Conclusion
165(1)
7.2 Reconfigurable Hysteretic DC-DC Converter
165(10)
7.2.1 Introduction
165(1)
7.2.2 Summary
166(1)
7.2.3 Converter Structure
166(2)
7.2.4 System
168(3)
7.2.5 Measurement Results
171(4)
7.2.6 Conclusion
175(1)
7.3 Single-Boundary Multi-Phase Hysteretic Converter
175(10)
7.3.1 Introduction
175(1)
7.3.2 Summary
175(1)
7.3.3 Converter Structure
175(1)
7.3.4 System
176(4)
7.3.5 Measurement Results
180(5)
7.3.6 Conclusion
185(1)
7.4 Phase-Handover Hysteretic Capacitive Converter with Feed-Forward Topology Control
185(14)
7.4.1 Introduction
185(1)
7.4.2 Summary
186(1)
7.4.3 Converter Structure
187(2)
7.4.4 System
189(6)
7.4.5 Measurement Results
195(3)
7.4.6 Conclusion
198(1)
7.5 Conclusion
199(2)
8 Conclusions
201(4)
8.1 Need for On-Chip DC-DC Conversion
201(1)
8.2 DC-DC Converter Types for Fully Integrated Power Management
202(1)
8.3 Noise Reduction in Fully Integrated DC-DC Converters
203(1)
8.4 Control of Fully Integrated DC-DC Converters
204(1)
References 205
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