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E-raamat: Complete PCB Design Using OrCad Capture and Layout

(Consultant, Silverdale, WA, USA)
  • Formaat: PDF+DRM
  • Ilmumisaeg: 01-Apr-2011
  • Kirjastus: Newnes (an imprint of Butterworth-Heinemann Ltd )
  • Keel: eng
  • ISBN-13: 9780080549200
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  • Formaat: PDF+DRM
  • Ilmumisaeg: 01-Apr-2011
  • Kirjastus: Newnes (an imprint of Butterworth-Heinemann Ltd )
  • Keel: eng
  • ISBN-13: 9780080549200
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This book provides instruction on how to use the OrCAD design suite to design and manufacture printed circuit boards. The book is written for both students and practicing engineers who need a quick tutorial on how to use the software and who need in-depth knowledge of the capabilities and limitations of the software package.

There are two goals the book aims to reach:
The primary goal is to show the reader how to design a PCB using OrCAD Capture and OrCAD Layout. Capture is used to build the schematic diagram of the circuit, and Layout is used to design the circuit board so that it can be manufactured.
The secondary goal is to show the reader how to add PSpice simulation capabilities to the design, and how to develop custom schematic parts, footprints and PSpice models. Often times separate designs are produced for documentation, simulation and board fabrication. This book shows how to perform all three functions from the same schematic design. This approach saves time and money and ensures continuity between the design and the manufactured product.

· Information is presented in the exact order a circuit and PCB are designed
· Straightforward, realistic examples present the how and why the designs work, providing a comprehensive toolset for understanding the OrCAD software
· Introduction to the IPC, JEDEC, and IEEE standards relating to PCB design
· Full-color interior and extensive illustrations allow readers to learn features of the product in the most realistic manner possible
· FREE CD containing the OrCAD demo version and design files

Arvustused

"I've found this book to be very helpful and exactly what I've been looking for. Kraig Mitzner has done a wonderful job of covering the full spectrum of printed circuit board fabrication. The content spans not only the OrCAD Layout software, but the physical process of PCB fabrication and advanced topics such as RF issues." --Jeff Will, Valparaiso University

Introduction xv
Acknowledgments xix
Introduction to PCB Design and CAD
1(16)
Computer-Aided Design and the OrCAD Design Suite
1(1)
Printed Circuit Board Fabrication
2(9)
PCB cores and layer stack-up
2(2)
PCB fabrication process
4(1)
Photolithography and chemical etching
5(3)
Mechanical milling
8(1)
Layer registration
9(2)
Function of OrCAD Layout in the PCB Design Process
11(3)
Design Files Created by Layout
14(3)
Layout format files (.MAX)
14(1)
Postprocess (Gerber) files
14(1)
PCB assembly layers and files
14(3)
Introduction to the PCB Design Flow by Example
17(22)
Overview of the Design Flow
17(1)
Creating a Circuit Design with Capture
17(8)
Starting a new project
17(3)
Placing parts
20(3)
Wiring (connecting) the parts
23(1)
Creating the Layout netlist in Capture
23(2)
Designing the PCB with Layout
25(14)
Starting Layout and importing the netlist
25(4)
Making a board outline
29(2)
Placing the parts
31(1)
Autorouting the board
32(1)
Manual routing
32(2)
Cleanup
34(1)
Locking traces
34(1)
Performing a design rule check
35(1)
Postprocessing the board design for manufacturing
35(4)
Project Structures and the Layout Tool Set
39(26)
Project Setup and Schematic Entry Details
39(4)
Capture projects explained
39(3)
Capture part libraries explained
42(1)
Understanding the Layout Environment and Tool Set
43(22)
Board technology files
43(1)
The AutoECO utility
44(2)
The session frame and Design window
46(1)
The toolbar
47(10)
Controlling the autorouter
57(3)
Postprocessing and layer details
60(5)
Introduction to Industry Standards
65(14)
Introduction to the Standards Organizations
66(2)
Institute for Printed Circuits (IPC-Association Connecting Electronics Industries)
66(1)
Electronic Industries Alliance (EIA)
66(1)
Joint Electron Device Engineering Council (JEDEC)
66(1)
International Engineering Consortium (IEC)
67(1)
Military Standards
67(1)
American National Standards Institute (ANSI)
67(1)
Institute of Electrical and Electronics Engineers (IEEE)
67(1)
Classes and Types of PCBs
68(2)
Performance classes
68(1)
Producibility levels
68(1)
Fabrication types and assembly subclasses
69(1)
OrCAD Layout design complexity levels---IPC performance classes
69(1)
IPC land pattern density levels
70(1)
Introduction to Standard Fabrication Allowances
70(1)
Registration tolerances
70(1)
Breakout and annular ring control
70(1)
PCB Dimensions and Tolerances
71(4)
Standard panel sizes
71(1)
Tooling area allowances and effective panel usage
72(1)
Standard finished PCB thickness
72(1)
Core thickness
73(1)
Prepreg thickness
73(1)
Copper thickness for PTHs and vias
73(1)
Copper cladding/foil thickness
74(1)
Copper Trace and Etching Tolerances
75(1)
Standard Hole Dimensions
76(1)
Soldermask Tolerance
77(1)
End Note
77(2)
Suggested reading
77(1)
Other items of interest
77(2)
Introduction to Design for Manufacturing
79(30)
Introduction to PCB Assembly and Soldering Processes
79(1)
Assembly Processes
79(2)
Manual assembly processes
79(1)
Automated assembly processes (pick and place)
80(1)
Soldering Processes
81(4)
Manual soldering
81(1)
Wave soldering
82(2)
Reflow soldering
84(1)
Component Placement and Orientation Guide
85(1)
Component Spacing for Through-hole Devices
86(1)
Discrete THDs
86(1)
Integrated circuit through-hole devices
86(1)
Mixed discrete and IC through-hole devices
86(1)
Holes and jumper wires
86(1)
Component Spacing for Surface-Mounted Devices
86(1)
Discrete SMDs
86(1)
Integrated-circuit SMDs
86(1)
Mixed discrete and IC SMDs
86(1)
Mixed THD and SMD Spacing Requirements
86(8)
Footprint and Padstack Design for PCB Manufacturability
94(1)
Land Patterns for Surface-Mounted Devices
94(7)
SMD padstack design
96(3)
SMD footprint design
99(2)
Land Patterns for Through-hole Devices
101(8)
Footprint design for through-hole devices
101(2)
Padstack design for through-hole devices
103(1)
Hole-to-lead ratio
103(1)
PTH land dimension (annular ring width)
104(2)
Clearance between plane layers and PTHs
106(1)
Soldermask and solder paste dimensions
107(2)
PCB Design for Signal Integrity
109(58)
Circuit Design Issues Not Related to PCB Layout
109(10)
Noise
109(1)
Distortion
110(1)
Frequency response
111(1)
Issues Related to PBCLayout
111(1)
Electromagnetic Interference and Cross Talk
111(1)
Magnetic fields and inductive coupling
112(3)
Loop inductance
115(2)
Electric fields and capacitive coupling
117(2)
Ground Planes and Ground Bounce
119(8)
What ground is and what it is not
119(3)
Ground (return) planes
122(1)
Ground bounce and rail collapse
123(2)
Split power and ground planes
125(2)
PCB Electrical Characteristics
127(17)
Characteristic impedance
127(6)
Reflections
133(4)
Ringing
137(2)
Electrically long traces
139(3)
Critical length
142(1)
Transmission line terminations
143(1)
PCB Routing Topics
144(23)
Parts placement for electrical considerations
145(1)
PCB layer stack-up
146(5)
Bypass capacitors and fanout
151(1)
Trace width for current carrying capability
151(2)
Trace width for controlled impedance
153(10)
Trace spacing for voltage withstanding
163(1)
Trace spacing to minimize cross talk (3w rule)
163(1)
Traces with acute and 90° angles
164(3)
Making and Editing Capture Parts
167(44)
The Capture Part Libraries
167(1)
Types of Packaging
168(1)
Homogeneous parts
168(1)
Heterogeneous parts
169(1)
Pins
169(1)
Part Editing Tools
170(1)
The Select tool and settings
170(1)
The pin tools
170(1)
The graphics tools
171(1)
The zoom tools
171(1)
Constructing Capture Parts
171(1)
Method 1: Constructing Parts Using the New Part Option (Design Menu)
172(15)
Design example for a passive, homogeneous part
172(8)
Design example for an active, multipart, homogeneous component
180(3)
Assigning power pin visibility
183(1)
Design example for a passive, heterogeneous part
184(3)
Method 2: Constructing Parts with Capture Using the Design Spreadsheet
187(3)
Method 3: Constructing Parts Using Generate Part from the Tools Menu
190(2)
Method 4: Generating Parts with the PSpice Model Editor
192(16)
Generating a Capture part library from a PSpice model library
193(1)
Making and/or Obtaining PSpice Libraries for Making New Capture Parts
194(1)
Downloading libraries and/or models from the Internet
195(1)
Making a PSpice model from a Capture project
196(10)
Adding PSpice templates (models) to preexisting Capture parts
206(2)
Constructing Capture Symbols
208(3)
Making and Editing Layout Footprints
211(52)
Introduction to the Library Manager
211(6)
Introduction to Layout's Footprint Libraries and Naming Conventions
212(1)
Layout's footprint libraries
213(1)
Naming conventions
213(4)
The Composition of Footprints
217(4)
Padstacks
217(1)
Obstacles
218(2)
Text
220(1)
Datums and insertion origins
220(1)
The Basic Footprint Design Process
221(5)
Working with Padstacks
226(5)
Accessing existing padstacks
227(1)
Editing padstack properties from the spreadsheet
228(1)
Saving footprints and padstacks
229(2)
Footprint Design Examples
231(12)
Design Example 1: a surface-mount footprint design
232(5)
Design Example 2: a modified through-hole footprint design
237(6)
Using the Pad Array Generator
243(20)
Introduction
243(1)
Footprint design for PGAs
243(5)
Footprint design for BGAs
248(10)
Blind, buried, and microvias
258(1)
Mounting holes
259(2)
Printing a catalog of a footprint library
261(2)
PCB Design Examples
263(148)
Overview of the Design Flow
264(2)
Example 1: Dual Power Supply, Analog Design
266(56)
Initial design concept and preparation
267(1)
Project setup and design in Capture
268(17)
Defining the board requirements
285(3)
Importing the design into Layout
288(1)
Setting up the board
289(17)
Prerouting the board
306(10)
Autorouting the board
316(2)
Finalizing the design
318(4)
Example 2: Mixed Analog/Digital Design Using Split Power, Ground Planes
322(30)
Mixed-signal circuit design in Capture
322(2)
Power and ground connections to digital and analog parts
324(1)
Connecting separate analog and digital grounds to a split plane
324(3)
Using busses for digital nets
327(1)
Defining the layer stack-up for split planes
328(2)
Establishing a primary power plane
330(4)
Creating split ground planes
334(2)
Creating nested power planes with copper pours
336(2)
Using anti-copper on plane layers
338(2)
Setting up and running the autorouter
340(2)
Moving a routed trace to a different layer
342(1)
Adding ground planes and guard traces to routing layers
342(3)
Defining vias for flood planes/pours
345(2)
Setting the copper pour spacing
347(1)
Stitching a ground plane manually
348(1)
Using anti-copper obstacles on copper pours
349(1)
Routing guard traces and rings
349(3)
Example 3: Multipage, Multipower, and Multiground Mixed A/D PCB Design with PSpice
352(24)
Project setup for PSpice simulation and Layout
354(2)
Adding schematic pages to the design
356(2)
Using off-page connectors with wires
358(1)
Using off-page connectors with busses
359(1)
Setting up multiple-ground systems
359(1)
Setting up PSpice sources
360(1)
Performing PSpice simulations
361(3)
Preparing the simulated project for Layout
364(1)
Assigning a new technology file
365(1)
Placing parts on the bottom (back) of a board
365(1)
Layer stack-up for a multiground system
365(2)
Net layer assignments
367(1)
Through-hole and blind via setup
367(1)
Fanning out a board with multiple vias
367(3)
Overriding known errors in Layout
370(1)
Autorouting with the DRC/route box
370(2)
Using forced thermals to connect ground planes
372(1)
Using the AutoECO to update a board from Capture
372(4)
Example 4: High-Speed Digital Design
376(21)
Layer setup for microstrip transmission lines
380(1)
Via design for heat spreaders
381(1)
Constructing a heat spreader with copper area obstacles
382(1)
Using free vias as heat pipes
382(5)
Determining critical trace length of transmission lines
387(1)
Routing controlled impedance traces
388(2)
Moated ground areas for clock circuits
390(1)
Routing curved traces
390(2)
Gate and pin swapping
392(3)
Stitching a ground plane with the free via matrix
395(2)
Miscellaneous Items
397(7)
Fixing bad pad exits
397(1)
Design cache---cleanup, replace, update
398(2)
Adding test points
400(1)
Types of AutoECOs
401(2)
Making a custom Capture template
403(1)
Making a custom Layout technology/template file
403(1)
Using the Stackup Editor
404(7)
Using the Stackup Editor with an active board design
404(3)
Using the Stackup Editor to set up a custom technology or template file
407(1)
Submitting stack-up drawings with Gerber files
408(1)
Adding solder thieves
408(1)
Printing a footprint catalog from a PCB design
409(2)
Postprocessing and Board Fabrication
411(12)
The Circuit Design with OrCAD
411(6)
Schematic design in Capture
411(2)
The board design with Layout
413(1)
Postprocessing the design with Layout
414(3)
Fabricating the Board
417(6)
Choosing a board house
417(1)
Setting up a user account
417(1)
Submitting Gerber files and requesting a quote
418(1)
Annotating the layer types and stack-up
419(3)
Receipt inspection and testing
422(1)
Nonstandard Gerber files
422(1)
Additional Tools
423(68)
Using PSpice to Simulate Transmission Lines
423(4)
Simulating digital transmission lines
424(3)
Simulating analog signals
427(1)
Using Microsoft Excel with a Bill of Materials Generated by Capture
427(2)
Using the Specctra Autorouter with Layout
429(8)
Introduction to GerbTool
437(12)
Opening a Layout-generated Gerber file with GerbTool
437(1)
Making a .DRL file for a CNC machine
438(5)
Panelization
443(6)
Using the IPC-7351 Land Pattern Viewer
449(3)
Using CAD Tools to 3-D Model a PCB
452(3)
Appendices
Appendix A: Layout Technology Files
455(2)
Appendix B: List of Design Standards
457(2)
Appendix C: A Partial List of Packages and Footprints and Some of the Footprints Included in OrCAD Layout
459(12)
Appendix D: Rise and Fall Times for Various Logic Families
471(2)
Appendix E: Drill and Screw Dimensions
473(2)
Appendix F: References by Subject
475(16)
Bibliography and References 491(4)
Index 495
Kraig Mitzner is a consultant in Silverdale, WA, USA