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E-raamat: FPGA-Based Embedded System Developer's Guide

(Defence Institute of Advanced Technology, Pune, Maharashtra, India)
  • Formaat: 846 pages
  • Ilmumisaeg: 09-Apr-2018
  • Kirjastus: CRC Press Inc
  • Keel: eng
  • ISBN-13: 9781351652278
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FPGA-Based Embedded System Developer's GuideSuurem pilt
  • Formaat: 846 pages
  • Ilmumisaeg: 09-Apr-2018
  • Kirjastus: CRC Press Inc
  • Keel: eng
  • ISBN-13: 9781351652278
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The book covers various aspects of VHDL programming and FPGA interfacing with examples and sample codes giving an overview of VLSI technology, digital circuits design with VHDL, programming, components, functions and procedures, and arithmetic designs followed by coverage of the core of external I/O programming, algorithmic state machine based system design, and real-world interfacing examples.

Focus on real-world applications and peripherals interfacing for different applications like data acquisition, control, communication, display, computing, instrumentation, digital signal processing and top module design

Aims to be a quick reference guide to design digital architecture in the FPGA and develop system with RTC, data transmission protocols
List of Figures xiii
List of Tables xxv
List of Abbreviations xxix
Preface xxxv
Author xxxix
Part I Basic System Modeling and Programming Techniques
1 Very-Large-Scale Integration Technology: History and Features
3(20)
1.1 Introduction and Preview
3(1)
1.2 A Review of Microelectronics
4(3)
1.3 Complementary Metal Oxide Semiconductor Technology and Gate Configuration
7(3)
1.4 CMOS Fabrication and Layout
10(2)
1.5 VLSI Design Flow
12(2)
1.6 Combinational and Sequential Circuit Design
14(1)
1.6.1 Combinational Logic Circuits
14(1)
1.6.2 Sequential Logic Circuits
15(1)
1.7 Subsystem Design and Layout
15(2)
1.8 Types of Application-Specific Integrated Circuits and Their Design Flow
17(2)
1.9 VHDL Requirements and Features
19(2)
Laboratory Exercises
21(2)
2 Digital Circuit Design with Very-High-Speed Integrated Circuit Hardware Description Language
23(68)
2.1 Introduction and Preview
23(1)
2.2 Code Design Structures
24(10)
2.3 Data Types and Their Conversions
34(11)
2.4 Operators and Attributes
45(5)
2.5 Concurrent Code
50(5)
2.6 Sequential Code
55(10)
2.7 Flip-Flops and Their Conversions
65(12)
2.7.1 Flip-Flops
65(5)
2.7.2 Flip-Flop Conversions
70(7)
2.8 Data Shift Registers
77(7)
2.9 Multifrequency Generator
84(5)
Laboratory Exercises
89(2)
3 Simple System Design Techniques
91(44)
3.1 Introduction
91(1)
3.2 Half and Full Adder
91(5)
3.3 Half and Full Subtractor
96(2)
3.4 Signed Magnitude Comparator
98(6)
3.5 Seven-Segment Display Interfacing
104(3)
3.6 Counter Design and Interfacing
107(8)
3.7 Digital Clock Design and Interfacing
115(8)
3.8 Pulse Width Modulation Signal Generation
123(4)
3.9 Special System Design Techniques
127(7)
3.9.1 Packages and Libraries
127(4)
3.9.2 Functions and Procedures
131(3)
Laboratory Exercises
134(1)
4 Arithmetic and Logical Programming
135(72)
4.1 Introduction and Preview
135(1)
4.2 Arithmetic Operations: Adders and Subtractors
136(16)
4.2.1 Serial Adder
137(4)
4.2.2 Parallel and Pipelined Adders
141(5)
4.2.3 Subtractors
146(6)
4.3 Arithmetic Operations: Multipliers
152(11)
4.4 Arithmetic Operations: Dividers
163(7)
4.5 Trigonometric Computations Using the COordinate Rotation DIgital Computer (CORDIC) Algorithm
170(15)
4.6 Multiply-Accumulation Circuit
185(3)
4.7 Arithmetic and Logical Unit
188(6)
4.8 Read-Only Memory Design and Logic Implementations
194(6)
4.9 Random Access Memory Design
200(3)
Laboratory Exercises
203(4)
Part II Custom Input/Output Peripheral Interfacing
5 Input/Output Bank Programming and Interfacing
207(54)
5.1 Introduction and Preview
207(1)
5.2 Optical Display Interfacing
208(7)
5.2.1 Light-Emitting Diode Displays
208(2)
5.2.2 Multisegment Display
210(5)
5.3 Buzzer Control
215(2)
5.4 Liquid Crystal Display Interfacing and Programming
217(11)
5.4.1 Liquid Crystal Display
217(6)
5.4.2 Graphical Liquid Crystal Display
223(5)
5.5 General-Purpose Switch Interfacing
228(7)
5.5.1 Dual Inline Package Switch
228(3)
5.5.2 Bidirectional Port/Switch Design
231(2)
5.5.3 Matrix Keypad Interfacing
233(2)
5.6 Dual-Tone Multifrequency Decoder
235(3)
5.7 Optical Sensor Interfacing
238(6)
5.7.1 Infrared Sensors
238(4)
5.7.2 Proximity Sensor
242(2)
5.8 Special Sensor Interfacing
244(11)
5.8.1 Passive Infrared Sensor
245(3)
5.8.2 Metal Detector
248(3)
5.8.3 Light-Dependent Resistor
251(4)
5.9 Wind-Speed Sensor Interfacing
255(4)
Laboratory Exercises
259(2)
6 System Design with Finite and Algorithmic State Machine Approaches
261(78)
6.1 Introduction and Preview
261(1)
6.2 Finite State Machine Design: Moore and Mealy Models
261(16)
6.2.1 Moore Finite State Machine Design
269(2)
6.2.2 Mealy Finite State Machine Design
271(5)
6.2.3 Finite State Machine Model Conversion
276(1)
6.3 Code Classifier and Binary to Binary-Coded Decimal Converters
277(9)
6.3.1 Input Code Classifier
278(4)
6.3.2 Binary-to-Binary-Coded-Decimal Converter and Its Arithmetic
282(4)
6.4 Binary Sequence Recognizer
286(7)
6.5 Vending Machine Controller
293(8)
6.6 Traffic Light Controller
301(8)
6.7 Escalator, Dice Game and Model Train Controller Designs
309(19)
6.7.1 Escalator Controller Design
309(5)
6.7.2 Dice Game Controller Design
314(8)
6.7.3 Electronic Model Train Controller Design
322(6)
6.8 Algorithmic State Machine Charts
328(4)
6.9 Algorithmic State Machine-Based Digital System Design
332(4)
Laboratory Exercises
336(3)
7 Interfacing Digital Logic to the Real World: Sensors, Analog to Digital, and Digital to Analog
339(102)
7.1 Introduction and Preview
339(1)
7.2 Basics of Signal Conditioning for Sensor Interfacing
339(5)
7.2.1 Analog to Digital Conversion
340(1)
7.2.2 Digital to Analog Conversion
341(3)
7.3 Principles of Sensor Interfacing and Measurement Techniques
344(12)
7.3.1 Optical Power Measurement
344(2)
7.3.2 Temperature Measurement
346(3)
7.3.3 Strain Measurement
349(1)
7.3.4 Magnitude Comparator
350(1)
7.3.5 ADC0804 Interfacing
351(5)
7.4 Universal Asynchronous Receiver-Transmitter Design
356(22)
7.4.1 Serial Communication: Data Reading/Writing Using MATLAB®
358(7)
7.4.2 UART: Transmitter Design
365(6)
7.4.3 Universal Asynchronous Receiver-Transmitter Receiver Design
371(7)
7.5 Multichannel Data Logging
378(21)
7.5.1 ADC0808/ADC0809 Interfacing
379(5)
7.5.2 ADC0848 Interfacing
384(12)
7.5.3 Analog to Digital Converter MAX1112 Interfacing and Serial Data Fetching
396(3)
7.6 Bipolar Signal Conditioning and Data Logging
399(12)
7.6.1 Bidirectional Analog to Digital Converter Interfacing
399(4)
7.6.2 Opto-Electronic Position Detector Interfacing
403(8)
7.7 Encoder/Decoder Interfacing for Remote Control Applications
411(4)
7.7.1 Optical Tx/Rx Wireless Control
411(1)
7.7.2 Radio Frequency Transmitter/Receiver Wireless Control
412(3)
7.8 Pseudorandom Binary Sequence Generator and Time-Division Multiple Access
415(11)
7.8.1 Serial Pseudorandom Binary Sequence Generator
415(3)
7.8.2 Parallel Pseudorandom Binary Sequence Generator
418(4)
7.8.3 Kasami Sequence Generator
422(2)
7.8.4 Analog Time Division Multiplexing and M-Array Pulse Amplitude Modulation
424(2)
7.9 Signal Generator Design and Interfacing
426(12)
7.9.1 Low Voltage Digital to Analog Conversion Using DAC0808
426(8)
7.9.2 High-Voltage Digital to Analog Conversion Using DAC7728
434(4)
Laboratory Exercises
438(3)
Part III Hardware Accelerated Designs
8 Real-Time Clock and Interface Protocol Programming
441(52)
8.1 Introduction and Preview
441(1)
8.2 Real-Time Clock (DS12887) Interface Programming
442(7)
8.3 Inter-Integrated Circuit Interface Programming
449(7)
8.4 Two-Wire Interface (SHT11 Sensor) Programming
456(5)
8.5 Serial Peripheral Interface (SCP1000D) Programming
461(6)
8.6 Global System for Mobile Communications Interface Programming
467(11)
8.7 Global Positioning System Interface Programming
478(2)
8.8 Personal System/2 Interface Programming
480(4)
8.9 Video Graphics Array Interface Programming
484(8)
Laboratory Exercises
492(1)
9 Real-World Control Device Interfacing
493(54)
9.1 Introduction and Preview
493(1)
9.2 Relay, Solenoid Valve, Opto-Isolator, and Direct Current Motor Interfacing and Control
493(15)
9.2.1 Relay Control
494(3)
9.2.2 Solenoid Valve Control
497(4)
9.2.3 Opto-Isolator Interfacing
501(3)
9.2.4 Direct Current Motor Control
504(4)
9.3 Servo and BLDC Motor Interfacing and Control
508(7)
9.3.1 Servo Motor Control
508(3)
9.3.2 Brushless Direct Current Motor Control
511(4)
9.4 Stepper Motor Control
515(3)
9.5 Liquid/Fuel Level Control
518(4)
9.6 Voltage and Current Measurement
522(4)
9.7 Power Electronic Device Interfacing and Control
526(6)
9.8 Power Electronics Bidirectional Switch Interfacing and Control
532(6)
9.8.1 Triac Control
532(4)
9.8.2 Diac Controller
536(2)
9.9 Real-Time Process Controller Design
538(6)
Laboratory Exercises
544(3)
10 Floating-Point Computations with Very-High-Speed Integrated Circuit Hardware Description Language and Xilinx System Generator (SysGen) Tools
547(80)
10.1 Introduction and Preview
547(2)
10.2 Representation of Fixed and Floating-Point Binary Numbers
549(12)
10.2.1 Fixed-Point Number System
549(4)
10.2.2 IEEE754 Single-Precision Floating-Point Number System
553(3)
10.2.3 IEEE754 Double-Precision Floating-Point Number System
556(2)
10.2.4 Customized Floating-Point Number System
558(3)
10.3 Floating-Point Arithmetic
561(14)
10.3.1 Floating-Point Addition
562(3)
10.3.2 Floating-Point Subtraction
565(3)
10.3.3 Floating-Point Multiplication
568(5)
10.3.4 Floating-Point Division
573(2)
10.4 Xilinx System Generator (SysGen) Tools
575(19)
10.4.1 Use and Interfacing Methods of Some Blocksets
577(6)
10.4.2 System Design and Implementation Using SysGen Tools
583(11)
10.5 Fractional-Point Computation Using SysGen Tools
594(9)
10.6 System Engine Model Using Xilinx Simulink Block Sets
603(7)
10.7 MATLAB® Code Interfacing with SysGen Tools
610(4)
10.8 Very-High-Speed Integrated Circuit Hardware Description Language Code Interfacing with SysGen Tools
614(6)
10.9 Real-Time Verification and Reconfigurable Architecture Design
620(4)
10.9.1 Design Flow for Hardware Co-Simulation
620(2)
10.9.2 Reconfigurable Architecture Design
622(2)
Laboratory Exercises
624(3)
Part IV Miscellaneous Design and Applications
11 Digital Signal Processing with Field-Programmable Gate Array
627(74)
11.1 Introduction and Preview
627(1)
11.2 Discrete Fourier Transform
628(13)
11.3 Digital Finite Impulse Response Filter Design
641(3)
11.4 Digital Infinite Impulse Response Filter Design
644(6)
11.5 Multirate Signal Processing
650(13)
11.6 Modulo Adder and Residual Number Arithmetic Systems
663(9)
11.6.1 Modulo 2n and 2n-1 Adder Design
663(2)
11.6.2 Residue Number System
665(7)
11.7 Distributed Arithmetic-Based Computations
672(12)
11.8 Booth Multiplication Algorithm and Design
684(6)
11.9 Adaptive Filter/Equalizer Design
690(8)
Laboratory Exercises
698(3)
12 Advanced SysGen-Based System Designs
701(40)
12.1 Introduction and Preview
701(1)
12.2 Fast Fourier Transform Computation Using SysGen Design
701(3)
12.3 Finite Impulse Response Digital Filter Design
704(6)
12.4 Infinite Impulse Response Digital Filter Design
710(2)
12.5 Multiply Accumulation Finite Impulse Response Filter Using SysGen Design
712(3)
12.6 Cascaded Integrator Comb Filter Design
715(4)
12.7 COordinate Rotation Digital Computer Design Using SysGen Tools
719(3)
12.8 Image Processing Using Discrete Wavelet Transform
722(5)
12.9 Very-High-Speed Integrated Circuit Hardware Description Language Design Debugging Techniques
727(12)
12.9.1 ChipScope Pro Analyzer
728(1)
12.9.2 Very-High-Speed Integrated Circuit Hardware Description Language Test-Bench Design
729(3)
12.9.3 Data/Text File Reading/Writing
732(7)
Laboratory Exercises
739(2)
13 Contemporary Design and Applications
741(42)
13.1 Introduction and Preview
741(1)
13.2 Differential Pulse Code Modulation System Design
741(3)
13.3 Data Encryption System
744(6)
13.4 Soft Computing Algorithms
750(5)
13.4.1 Artificial Neural Network
751(2)
13.4.2 Fuzzy Logic Controller
753(2)
13.5 Bit Error Rate Tester Design
755(6)
13.6 Optical Up/Down Data Link
761(5)
13.7 Channel Coding Techniques
766(7)
13.7.1 Linear Block Code
767(2)
13.7.2 Convolutional Code
769(4)
13.8 Pick-and-Place Robot Controller
773(2)
13.9 Audio Codec (AC97) Interfacing
775(6)
Laboratory Exercises
781(2)
Appendix A 783(8)
References 791(6)
Index 797
A. Arockia Bazil Raj received his B.E degree in Electronics and Communication Engineering from the Bharathidasan University, Tiruchirappalli, India, his M.E degree in Communication Systems and his Ph.D degree in Information and Communication Technology from the Anna University, Chennai, India. His Ph.D research on Free Space Optical Communication was fully funded by the Defence Research and Development Organization (DRDO), New Delhi, India, under the ER&IPR project. He has delivered several invited talks and headed national/international conferences sessions. He has authored several papers published in reputed international journals and conferences. He published four books that are designed based on his teaching and research experience. He is a Reviewer in various journals of IEEE, Springer, OSA, Wiley, Taylor & Francis, SAGE and Elsevier etc., He is a Member of ISTE, IEEE, IET and SPIE. He was an Assistant Professor in the Kings College of Engineering, Thanjavur, India from 2002 to 2006. He has been Associate Professor in the Research, Development and Establishment (RDE) section of the Laser Communication Laboratory (LCL) facility in the same institute from 2007 to October 2015. Presently, he is working in the field of Radar System Design and Radar Signal Processing in Defence Institute of Advanced Technology, Pune, Maharashtra, India from November 2015 onwards. He has successfully completed/investigated various research projects sponsored by government and non-government sectors/laboratories. His current research interests cover the free-space optical communication, Radar System Design, Photonics Radar Design, MIMO Radar Design and Radar signal processing.
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