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E-raamat: FPGAs 101: Everything you need to know to get started

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(CEO & founder, Brown-Smith RDL Inc., Baltimore, MD, USA)
  • Formaat: PDF+DRM
  • Ilmumisaeg: 16-Jan-2010
  • Kirjastus: Newnes (an imprint of Butterworth-Heinemann Ltd )
  • Keel: eng
  • ISBN-13: 9780080959658
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FPGAs 101: Everything you need to know to get startedSuurem pilt
  • Formaat: PDF+DRM
  • Ilmumisaeg: 16-Jan-2010
  • Kirjastus: Newnes (an imprint of Butterworth-Heinemann Ltd )
  • Keel: eng
  • ISBN-13: 9780080959658
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FPGAs (Field-Programmable Gate Arrays) can be found in applications such as smart phones, mp3 players, medical imaging devices, and for aerospace and defense technology. FPGAs consist of logic blocks and programmable interconnects. This allows an engineer to start with a blank slate and program the FPGA for a specific task, for instance, digital signal processing, or a specific device, for example, a software-defined radio. Due to the short time to market and ability to reprogram to fix bugs without having to respin FPGAs are in increasingly high demand.

This book is for the engineer that has not yet had any experience with this electrifying and growing field. The complex issue of FPGA design is broken down into four distinct phases - Design / Synthesis / Simulation / Place & Route. Numerous step-by-step examples along with source code accompany the discussion. A brief primer of one of the popular FPGA and hardware languages, VHDL, is incorporated for a simple yet comprehensive learning tool. While a general technology background is assumed, no direct hardware development understanding is needed. Also, included are details on tool-set up, verifaction techniques, and test benches. Reference material consists of a quick reference guide, reserved words, and common VHDL/FPGA terms.
  • Learn how to design and develop FPGAs -- no prior experience necessary!
  • Breaks down the complex design and development of FPGAs into easy-to-learn building blocks
  • Contains examples, helpful tips, and step-by-step tutorials for synthesis, implementation, simulation, and programming phases

Arvustused

"FPGAs 101 provides somebody who has very little exposure to FPGAs or VHDL, but some familiarity with digital design, with an introduction to FPGA design. The first chapter, Getting Started, provides a beginners overview of programming, including how to name variables correctly, how to leave good comments, and how to find a good text editor. Later in the chapter, Smith begins an overview of the hardware description language, which extends until the end of Chapter 2. These chapters are written for those with no VHDL experience and are intended to provide a learn-by-example tutorial for implementing simple digital designs using VHDL, such as combinational logic circuits, flops, and counters." --reviewed on the Ethical Hacker website

Muu info

Learn how to design and develop FPGAs - absolutely no prior experience necessary!
About the Author ix
Acknowledgments xi
About This Book xiii
Acronyms xv
Getting Started
1(20)
Introduction
1(1)
VHDL
1(1)
Reserved Words
2(1)
Tips for Writing Good Code
3(3)
Use Comments to Convey Information about the Code
3(1)
Indent for Clarity and Readability
4(1)
Use Standard Format Convention
4(1)
Include a Header Section
4(1)
Use Brief Descriptive Names
5(1)
HDL Text Editors
6(1)
Standalone Text Editor
6(1)
Fee-Based Text Editor
7(1)
Editor Features
7(5)
Syntax Color Highlighting
7(1)
Language Templates
8(1)
Row and Column Editor
8(1)
Comment/Uncomment Selected Text
9(2)
Indent/Unindent Selected Text
11(1)
Predefined Font Convention
11(1)
Signals
12(2)
Signal Data Types
12(2)
Signal Names
14(1)
File Structure
14(5)
Optional Header Section
14(1)
Library Declaration
14(2)
Entity Section
16(1)
Architecture Section
17(2)
Starter Tips
19(1)
Chapter Overview
20(1)
Simple Designs
21(22)
Introduction
21(1)
Starter Template
21(1)
Mathematical Functions
22(3)
Logic Gate
25(1)
D Flip-Flop
26(3)
Latch
29(1)
Shift Register
30(2)
Comparator
32(1)
Binary Counter
33(2)
Conversion Functions
35(2)
Read File
37(3)
Write File
40(2)
Chapter Overview
42(1)
FPGA Development Phases
43(14)
Introduction
43(1)
What Is a Field Programmable Gate Array?
43(1)
I/O Interfaces
44(1)
Basic Logic Building Blocks
45(5)
Ability to Interconnect
50(1)
Programmable Logic Device Options
51(2)
FPGA Development Phases
53(1)
Chapter Overview
54(3)
Design
57(26)
Introduction
57(1)
What Is the Design Phase?
57(1)
Design Package
58(1)
Evaluating the Design Package
59(3)
Package Analysis
60(1)
Getting Clarification
60(1)
Organization
61(1)
Predesign Decisions
62(5)
Design Format
63(2)
FPGA Manufacturer
65(1)
Development Tools
66(1)
Creating Design Options
67(1)
Automatic Code Generators
67(1)
Manual Code Generation
68(13)
Design Package
68(13)
Chapter Overview
81(2)
Simulation
83(44)
Introduction
83(1)
What Is Simulation?
84(1)
Simulation Tools
85(1)
Levels of Simulation
86(1)
Test Cases
87(2)
Stimulus
89(28)
Interactive Stimulus
89(1)
Graphical Test Bench
90(2)
HDL Testbench
92(3)
Manual Testbench
95(5)
Simulation Phase Outputs
100(2)
Automatic Testbench
102(3)
Capture Data
105(12)
Simulation Tutorial
117(8)
Chapter Overview
125(2)
Synthesis
127(34)
Introduction
127(1)
What Is Design Synthesis?
128(3)
Design Check and Resource Association
130(1)
Optimization
130(1)
Technology Mapping
131(1)
Synthesis Phase Tools
131(5)
Vendors and Features
132(3)
Synthesis Tool Setup
135(1)
Synthesis Input
136(1)
Synthesis Output Files
137(3)
Netlists
138(1)
Status Reports
139(1)
Schematic Views
139(1)
Technology Schematic View
139(1)
Synthesis Tutorial
140(18)
Chapter Overview
158(3)
Implementation
161(30)
Introduction
161(1)
What Is Implementation?
161(4)
Translate
162(1)
Map
163(1)
Place and Route
163(1)
Generate Program File
164(1)
Implementation Tools
165(1)
Implementation Inputs
165(1)
Implementation Outputs
166(1)
Implementation Tutorial
167(22)
Chapter Overview
189(2)
Programming
191(14)
Introduction
191(1)
What Is Programming?
191(2)
Tools and Hardware
193(3)
Joint Test Advisory Group
193(1)
In-System Programming
194(1)
Third Party Programmers
194(2)
Hardware Configuration
196(2)
Programming Tutorial
198(4)
Chapter Overview
202(3)
References and Sources
205(2)
Web Sites
205(1)
Data I/O
206(1)
Appendix: Testbenches
207(18)
Adder and Subtracter Testbench
207(2)
Logic Gates Testbench
209(1)
D Flip-Flop Testbench
210(2)
DFF with Synchronous Enable Testbench
212(2)
Latch Design Testbench
214(2)
Manual Shift Register Testbench
216(2)
Comparator Testbench
218(2)
Binary Counter Testbench
220(1)
Binary Counter with Synchronous Enable Testbench
221(2)
Conversion Testbench
223(2)
Index 225
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