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E-raamat: FPGAs for Software Programmers

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  • Formaat: PDF+DRM
  • Ilmumisaeg: 17-Jun-2016
  • Kirjastus: Springer International Publishing AG
  • Keel: eng
  • ISBN-13: 9783319264080
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  • Formaat: PDF+DRM
  • Ilmumisaeg: 17-Jun-2016
  • Kirjastus: Springer International Publishing AG
  • Keel: eng
  • ISBN-13: 9783319264080

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This book makes powerful Field Programmable GateArray (FPGA) and reconfigurable technology accessible to software engineers bycovering different state-of-the-art high-level synthesis approaches (e.g.,OpenCL and several C-to-gates compilers). It introduces FPGA technology, itsprogramming model, and how various applications can be implemented on FPGAswithout going through low-level hardware design phases. Readers will get arealistic sense for problems that are suited for FPGAs and how to implementthem from a software designer"s point of view.The authors demonstrate that FPGAs and their programming model reflectthe needs of stream processing problems much better than traditional CPU or GPUarchitectures, making them well-suited for a wide variety of systems, fromembedded systems performing sensor processing to large setups for Big Datanumber crunching. This book serves as aninvaluable tool for software designers and FPGA design engineers who are interestedin high design

productivity through behavioural synthesis, domain-specificcompilation, and FPGA overlays.Introduces FPGA technology to softwaredevelopers by giving an overview of FPGA programming models and design tools,as well as various application examples;Provides a holistic analysis of the topic andenables developers to tackle the architectural needs for Big Data processingwith FPGAs;Explains the reasons for the energy efficiencyand performance benefits of FPGA processing;Provides a user-orientedapproach and a sense for where and how to apply FPGA technology.

Introduction.- CPUs, GPUs, CGRAs, Vector Processing, Systolic Arrays, FPGAs.- The von Neuman Model versus data stream processing.- FPGAs for software designers.- Languages, libraries, and compilers for specific problems.- Behavioral Compiler Capabilities and optimization strategies.- Mapping Approaches and Tools for Heterogeneous FPGAs.- Automatic Tool Flows.- Design frameworks, tools, and tool interaction.- Hardware Platforms.- Parallel Architectures and Overlays.- FPGA Virtualization.- Applications from a Programmers Point of View.- Future Directions.
1 FPGA Versus Software Programming: Why, When, and How?
1(22)
Dirk Koch
Daniel Ziener
Frank Hannig
2 High-Level Synthesis
23(26)
Joao M.P. Cardoso
Markus Weinhardt
3 A Quick Tour of High-Level Synthesis Solutions for FPGAs
49(14)
Frank Hannig
Part I Commercial HLS Solutions
4 Making FPGAs Accessible with LabVIEW
63(18)
Hugo A. Andrade
Stephan Ahrends
Simon Hogg
5 Spatial Programming with OpenSPL
81(16)
Tobias Becker
Oskar Mencer
Georgi Gaydadjiev
6 OpenCL
97(18)
Deshanand Singh
Peter Yiannacouras
7 Big Data and HPC Acceleration with Vivado HLS
115(22)
Moritz Schmid
Christian Schmitt
Frank Hannig
Gorker Alp Malazgirt
Nehir Sonmez
Arda Yurdakul
Adrian Cristal
8 Source-to-Source Optimization for HLS
137(28)
Jason Cong
Muhuan Huang
Peichen Pan
Yuxin Wang
Peng Zhang
9 Bluespec System Verilog
165(10)
Oriol Arcas-Abella
Nehir Sonmez
Part II Academic HLS Solutions
10 LegUp High-Level Synthesis
175(16)
Andrew Canis
Jongsok Choi
Blair Fort
Bain Syrowik
Ruo Long Lian
Yu Ting Chen
Hsuan Hsiao
Jeffrey Goeders
Stephen Brown
Jason Anderson
11 ROCCC 2.0
191(14)
Walid A. Najjar
Jason Villarreal
Robert J. Halstead
12 HIPAcc
205(22)
Moritz Schmid
Oliver Reiche
Frank Hannig
Jurgen Teich
Part III FPGA Runtime Systems and OS Services
13 ReconOS
227(18)
Andreas Agne
Marco Platzner
Christian Plessl
Markus Happe
Enno Lubbers
14 The LEAP FPGA Operating System
245(16)
Kermin Fleming
Michael Adler
Part IV SoC and Overlays on FPGAs
15 Systems-on-Chip on FPGAs
261(24)
Jeffrey Goeders
Graham M. Holland
Lesley Shannon
Steven J.E. Wilton
16 FPGA Overlays
285(22)
Hayden Kwok-Hay So
Cheng Liu
References 307(16)
Index 323
Dirk Koch is a lecturer in the Advanced Processor Technologies Group at the University of Manchester. His main research interest is on run-time reconfigurable systems based on FPGAs, including methods, tools and applications. Current research projects include database acceleration using FPGAs based on stream processing as well as reconfigurable instruction set extensions for CPUs. Dirk was a program co-chair of the FPL2012 conference and he is a program committee member of many FPGA related conferences and workshops. He is author of the book "Partial Reconfiguration on FPGAs," he holds two patents, and he has (co-)authored over 50 conference and journal publications. Frank Hannig leads the Architecture and Compiler Design Group in the CS Department at the Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany, since 2004. He received a diploma degree in an interdisciplinary course of study in EE and CS from the University of Paderborn, Germany in 2000 and a Ph.D. degree (Dr.-Ing.) in CS from FAU in 2009. His main research interests are the design of massively parallel architectures, ranging from dedicated hardware to multi-core architectures, mapping methodologies for domain-specific computing, and architecture/compiler co-design. Frank has authored or co-authored more than 120 peer-reviewed publications. He serves on the program committees of several international conferences (ARC, ASAP, CODES+ISSS, DATE, DASIP, SAC). Frank is a senior member of the IEEE and an affiliate member of the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC).Daniel Ziener is currently a substitute professor for Cyber-Physical Systems at the Technische Universität Hamburg-Harburg, Germany. From 2010 to 2015, he had led the Reconfigurable Computing Group in the Computer Science Department at Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany. His main research interests are the usage of partial dynamic reconfiguration of FPGAs, efficient usage of FPGA structures, design of signal processing FPGA cores, reliable and fault tolerant embedded systems, as well as security in FPGA-based systems. Daniel has (co-)authored more than 35 peer-reviewed publications, holds two patents, and serves as a program committee member of several international conferences (DATE, FPL, Reconfig, SPL) as well as a reviewer for several international journals.