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1 Literature Review for Digital Implementations of Fuzzy Logic Type-1 and Type-2 |
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1 | (70) |
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1.1 Advances in Applications of Fuzzy Logic Systems |
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1 | (5) |
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1.2 FPGA and Microcontrollers Used for Fuzzy Logic Applications |
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6 | (4) |
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1.2.1 Microcontroller Application |
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7 | (1) |
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7 | (2) |
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9 | (1) |
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10 | (10) |
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1.3.1 Type-1 Fuzzy Set (T1Fs) |
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13 | (1) |
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1.3.2 Membership Function |
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14 | (6) |
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1.3.3 Discourse Universe and Membership Degree |
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20 | (1) |
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20 | (2) |
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22 | (1) |
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22 | (1) |
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1.6 Defuzzification Methods |
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23 | (2) |
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1.7 Fuzzy Inference Methods |
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25 | (4) |
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29 | (3) |
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1.9 Numerical Example (Mandani) |
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32 | (3) |
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1.10 Basic Numerical Example (TSK) |
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35 | (1) |
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1.11 Type-2 Fuzzy Logic Set |
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36 | (3) |
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1.11.1 Historical Review of Advances |
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36 | (1) |
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1.11.2 Type-2 Fuzzy Sets (T2FS) |
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37 | (2) |
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1.11.3 Footprint of Uncertainty |
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39 | (1) |
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1.12 Fuzzy Sets Type 2 Representations |
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39 | (3) |
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1.12.1 Digital and Continuous Representation |
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39 | (3) |
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1.13 Interval Type 2 Fuzzy Sets (IT2FS) |
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42 | (2) |
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1.14 Type Reduction and Defuzzification |
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44 | (10) |
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1.14.1 Karnik--Mendel Iterative Procedure (KM) |
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44 | (2) |
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1.14.2 Wu-Mendel Uncertain Bounds |
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46 | (1) |
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1.14.3 Enhanced Karnik--Mendel Algorithm |
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47 | (2) |
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1.14.4 Type 2 Fuzzy Logic Systems Block Diagram |
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49 | (1) |
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1.14.5 Interval Type 2 Fuzzy Logic Numeric Example |
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50 | (4) |
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1.15 Experimental Implementation of a Fuzzy Logic Controller Type-2 in Quadrotors |
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54 | (3) |
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54 | (1) |
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1.15.2 Quadrotor Basic Principles |
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55 | (1) |
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56 | (1) |
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1.16 Design of Fuzzy Logic Controller Tuned by an Expert |
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57 | (5) |
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1.17 Design of Fuzzy Logic Controller Tuned by an Anfis |
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62 | (2) |
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1.18 Experimental Results |
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64 | (7) |
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67 | (4) |
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71 | (68) |
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2.1 Field-Programmable Gate Array (FPGA) |
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71 | (19) |
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2.1.1 How Do FPGA-Based Control Systems Compare to Processor-Based Systems? |
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72 | (2) |
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2.1.2 How Do I Program My Control Application Using the LabVIEW FPGA Module? |
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74 | (2) |
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2.1.3 How Does the LabVIEW Compiler Translate My Graphical Code into FPGA Circuitry? |
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76 | (1) |
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2.1.4 FPGAs Are Fast, but How Do Faster Loop Rates Improve Control System Performance? |
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77 | (1) |
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2.1.5 What FPGA Hardware Targets Are Available from NI? |
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78 | (2) |
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2.1.6 What Closed-Loop Control Performance Can I Achieve? |
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80 | (1) |
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2.1.7 How Much Jitter Can I Expect in My FPGA-Based Control Loops? |
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81 | (1) |
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2.1.8 Creating a New LabVIEW Real-Time Project and Adding I/O |
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82 | (8) |
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2.2 Developing the LabVIEW FPGA Application |
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90 | (11) |
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2.3 Compiling the FPGA Application |
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101 | (3) |
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2.3.1 Understanding the LabVIEW FPGA Compilation Process |
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102 | (1) |
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103 | (1) |
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2.3.3 The Compilation Report |
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103 | (1) |
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2.4 Advanced Methods for LABVIEW FPGA |
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104 | (18) |
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105 | (1) |
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2.4.2 Technique 1: Use Single-Cycle Timed Loops (SCTLs) |
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106 | (4) |
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2.4.3 Creating Counters and Timers |
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110 | (1) |
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2.4.4 Write Your FPGA Code as Modular, Reusable SubVIs |
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111 | (3) |
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2.4.5 Separate Logic from I/O |
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114 | (1) |
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2.4.6 Holding State Values in a Function Block |
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115 | (2) |
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2.4.7 Run-Time Updateable Look-up Table (LUT) |
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117 | (2) |
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2.4.8 Do not Place Delay Timers in the SubVI |
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119 | (1) |
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120 | (2) |
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2.5 Use Simulation Before You Compile |
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122 | (6) |
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2.5.1 Providing Tick Count Values for Simulation |
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123 | (2) |
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2.5.2 Test the LabVIEW FPGA Code Using the LabVIEW Control Design & Simulation Module |
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125 | (3) |
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2.6 Synchronize Your Loops |
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128 | (4) |
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129 | (1) |
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2.6.2 Application Example |
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130 | (2) |
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2.7 Technique 5: Avoid "Gate Hogs" |
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132 | (7) |
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2.7.1 Avoid Front Panel Arrays for Data Transfer |
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133 | (1) |
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2.7.2 Use DMA for Data Transfer |
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134 | (1) |
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2.7.3 Use the Minimum Data Type Necessary |
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135 | (1) |
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2.7.4 Optimizing for Size |
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135 | (3) |
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2.7.5 Additional Techniques to Optimize Your FPGA Applications |
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138 | (1) |
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138 | (1) |
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3 Real-Time Fuzzy Logic Controllers |
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139 | (20) |
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3.1 Basic Parts in Real-Time Fuzzy Logic Controllers |
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139 | (1) |
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3.2 Case Study: The Karnik--Mendel Algorithms Performance Implemented in Real-Time LABVIEW FPGA |
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140 | (8) |
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3.2.1 Interval Type-2 Fuzzy Logic Systems |
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141 | (1) |
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3.2.2 The Karnik--Mendel Algorithm |
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142 | (1) |
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3.2.3 Non-iterative Version |
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142 | (2) |
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144 | (2) |
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3.2.5 Enhanced Karnik--Mendel Algorithm |
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146 | (1) |
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147 | (1) |
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148 | (4) |
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3.3.1 Laplace Transform Model |
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149 | (1) |
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3.3.2 State-Space Transfer Function |
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150 | (1) |
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3.3.3 Servomotor Control System |
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151 | (1) |
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3.4 The Hardware Complexity |
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152 | (1) |
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153 | (2) |
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3.6 Results and Discussion |
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155 | (4) |
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155 | (1) |
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3.6.2 The Hardware Performance |
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155 | (3) |
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158 | (1) |
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4 Fuzzy Logic Type 1 and Type 2 LabVIEW FPGA Toolkit |
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159 | (72) |
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159 | (3) |
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4.1.1 Membership Function Parameters |
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160 | (1) |
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161 | (1) |
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161 | (1) |
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161 | (1) |
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162 | (7) |
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4.2.1 Membership Function Parameters |
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162 | (1) |
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162 | (1) |
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163 | (1) |
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163 | (1) |
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164 | (2) |
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166 | (3) |
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4.3 Creating a Knowledge Base |
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169 | (2) |
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4.3.1 Building a Rule Set |
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169 | (2) |
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171 | (9) |
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180 | (6) |
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4.5.1 T1 Mamdani Model the Centroid |
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180 | (1) |
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4.5.2 T2 Mamdani Model the Karnik--Mendel Algorithm |
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181 | (1) |
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4.5.3 The Enhanced Karnik--Mendel Algorithm |
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182 | (1) |
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4.5.4 The Nie--Tan Method |
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182 | (1) |
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4.5.5 The Takagi--Sugeno Model |
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183 | (3) |
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186 | (1) |
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187 | (13) |
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187 | (5) |
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4.7.2 Electric Wheelchair |
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192 | (8) |
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200 | (2) |
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4.9 Performance T1 FLS DC Servomotor |
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202 | (2) |
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4.9.1 Electric Wheelchair |
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203 | (1) |
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204 | (6) |
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204 | (2) |
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206 | (1) |
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4.10.3 Resource Utilization |
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206 | (4) |
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210 | (21) |
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4.11.1 Case Study: Experimental CNC Micromachine Controlled by Fuzzy Type 2 |
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210 | (2) |
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4.11.2 Micromachines and Fuzzy Logic |
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212 | (1) |
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4.11.3 Reconfigurable Micromachine Tools |
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213 | (2) |
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215 | (2) |
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4.11.5 Control Design on Real-Time FPGA |
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217 | (5) |
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4.11.6 Experimental Results |
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222 | (6) |
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228 | (3) |
Index |
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231 | |