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E-raamat: Millimeter-Wave Low Noise Amplifiers

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This book is the first standalone book that combines research into low-noise amplifiers (LNAs) with research into millimeter-wave circuits. In compiling this book, the authors have set two research objectives. The first is to bring together the research context behind millimeter-wave circuit operation and the theory of low-noise amplification. The second is to present new research in this multi-disciplinary field by dividing the common LNA configurations and typical specifications into subsystems, which are then optimized separately to suggest improvements in the current state-of-the-art designs. To achieve the second research objective, the state-of-the-art LNA configurations are discussed and the weaknesses of state-of the art configurations are considered, thus identifying research gaps. Such research gaps, among others, point towards optimization at a systems and microelectronics level. Optimization topics include the influence of short wavelength, layout and crosstalk on LNAperformance. Advanced fabrication technologies used to decrease the parasitics of passive and active devices are also explored, together with packaging technologies such as silicon-on-chip and silicon-on-package, which are proposed as alternatives to traditional IC implementation. This research outcome builds through innovation. Innovative ideas for LNA construction are explored, and alternative design methodologies are deployed, including LNA/antenna co-design or utilization of the electronic design automation in the research flow. The book also offers the authors proposal for streamlined automated LNA design flow, which focuses on LNA as a collection of highly optimized subsystems.
1 Introduction and Research Impact
1(28)
1.1 Low-Noise Amplifier Research Contextualization: A Transmitter and Receiver System
3(4)
1.1.1 Transmitter
4(1)
1.1.2 The Receiver and the Role of a Low-Noise Amplifier
5(2)
1.2 Significance of Active and Passive Devices for Low-Noise Amplifier Research
7(2)
1.3 Significance of Device Packaging at Millimeter-Wave Range
9(1)
1.4 Practical Research Focus: Applications of Millimeter-Wave Low-Noise Amplifiers
9(2)
1.5 Identifying Research Gaps: Fundamental Principles of Operation of Low-Noise Amplifiers
11(8)
1.5.1 Low-Noise Amplifier Topologies
11(3)
1.5.2 Gain of the Low-Noise Amplifier
14(1)
1.5.3 Noise in Low-Noise Amplifiers
14(1)
1.5.4 Power Consumption and Efficiency
14(1)
1.5.5 Reverse Isolation
15(1)
1.5.6 Impedance Matching
16(1)
1.5.7 Bandwidth and Gain Flatness
16(1)
1.5.8 LNA Sensitivity
17(1)
1.5.9 LNA Selectivity
17(1)
1.5.10 Low-Noise Amplifier Linearity
18(1)
1.5.11 The Role of Electronic Design Automation
18(1)
1.6 Research Questions: Low-Noise Amplifier for Millimeter-Wave Applications
19(1)
1.7 Contribution to the Body of Knowledge
20(1)
1.8 Content Overview
20(9)
1.8.1 Part I
21(1)
1.8.2 Part II
22(1)
References
23(6)
Part I Research Contextualization: Dissecting the Low-Noise Amplifier---A Sum of Parts
2 Specification-Governed Telecommunication and High-Frequency-Electronics Aspects of Low-Noise Amplifier Research
29(48)
2.1 Frequency and Wavelength
30(1)
2.2 Frequency Spectrum and Transmission Bands
31(3)
2.3 The Millimeter-Wave Frequency Range
34(4)
2.3.1 Millimeter-Wave Bandwidth Allocations
34(2)
2.3.2 Propagation of Millimeter Waves
36(2)
2.4 Digital Modulation Schemes for Millimeter-Wave Applications
38(5)
2.4.1 On-Off Keying
39(1)
2.4.2 Phase Shift-Keying
39(1)
2.4.3 Frequency Shift-Keying
40(1)
2.4.4 Pulse-Amplitude Modulation
41(1)
2.4.5 Quadrature Amplitude Modulation
41(1)
2.4.6 Orthogonal Frequency-Division Multiplexing
42(1)
2.5 Antennas for Millimeter-Waves
43(4)
2.5.1 General Antenna Theory
44(1)
2.5.2 Millimeter-Wave Antennas
45(2)
2.6 High-Frequency Electronics: Practical Two-Port Modeling of Low-Noise Amplifiers
47(3)
2.6.1 Admittance Parameters
47(1)
2.6.2 S-Parameters
48(2)
2.7 Practical Amplifier Gain Relationships and Stability
50(5)
2.7.1 Reflection Coefficients
50(1)
2.7.2 Gain Relationships
51(3)
2.7.3 Amplifier Stability
54(1)
2.8 Impedance Matching
55(4)
2.8.1 Lumped Element Matching
55(2)
2.8.2 Transmission-Line Matching
57(2)
2.8.3 Matching and Constant Voltage Standing Wave Ratio
59(1)
2.9 Biasing
59(1)
2.10 Broadband Amplifier Techniques
60(3)
2.11 Narrowband Amplifier Techniques
63(1)
2.12 Noise in Amplifiers
64(5)
2.12.1 Noise Figure
64(1)
2.12.2 Noise Floor
65(1)
2.12.3 Noise Temperature
66(1)
2.12.4 Noise Bandwidth
66(1)
2.12.5 Minimum Noise Figure and Practical Amplifier Design
66(1)
2.12.6 Input Noise Power
67(1)
2.12.7 Noise Factor in a Cascaded System
68(1)
2.13 Amplifier Linearity
69(5)
2.13.1 Harmonic Distortion and Intermodulation Distortion
69(2)
2.13.2 Gain Compression
71(1)
2.13.3 Third Order Intercept Point
72(1)
2.13.4 Amplifier Dynamic Range
73(1)
2.14 Performance Measure of a Low-Noise Amplifier
74(1)
2.15 Concluding Remarks
74(3)
References
75(2)
3 Technologies for Low-Noise Amplifiers in the Millimeter-Wave Regime
77(34)
3.1 Transistor Technologies
78(7)
3.1.1 Figures of Merit
79(1)
3.1.2 CMOS
80(2)
3.1.3 High-Electron Mobility Transistor Technology
82(1)
3.1.4 Heterojunction Bipolar Transistor Technology
82(2)
3.1.5 Other Technologies
84(1)
3.1.6 Comparative Analysis
84(1)
3.2 Substrates for Discrete Implementations and Silicon on Package
85(1)
3.3 Transistor Modeling for Small-Signal Operation
86(12)
3.3.1 MOSFET Modeling
87(6)
3.3.2 Bipolar Modeling
93(5)
3.4 Transistor Modeling for Noise
98(9)
3.4.1 Sources of Noise
99(2)
3.4.2 MOSFET Modeling
101(2)
3.4.3 Bipolar Modeling
103(2)
3.4.4 Noise Figure in HBTs and MOSFETs
105(2)
3.5 Concluding Remarks
107(4)
References
108(3)
4 Passives for Low-Noise Amplifiers
111(40)
4.1 Quality Factor
112(1)
4.2 Transmission Lines
113(7)
4.2.1 Types of Transmission Lines
114(1)
4.2.2 General Transmission Line
115(2)
4.2.3 The Quarter-Wave Transformer
117(3)
4.3 Resistors
120(2)
4.4 Capacitors
122(5)
4.4.1 Discrete Capacitors
123(1)
4.4.2 Integrated Capacitors
123(3)
4.4.3 Transmission-Line Capacitors
126(1)
4.5 Inductors
127(18)
4.5.1 Discrete Inductors
128(1)
4.5.2 Integrated Active Inductors
129(1)
4.5.3 Bond Wires
130(1)
4.5.4 Ribbon Inductors
131(1)
4.5.5 Spiral Inductors
131(10)
4.5.6 Micro-Electro-Mechanical System Inductors
141(1)
4.5.7 Transmission-Line Inductors
142(1)
4.5.8 Other On-Chip Inductor Implementations
143(1)
4.5.9 RF Chokes
144(1)
4.6 Transformers and Baluns
145(2)
4.7 Concluding Remarks
147(4)
References
147(4)
5 General Low-Noise Amplifiers
151(24)
5.1 Research, Design and Development Considerations for Millimeter-Wave Applications
152(1)
5.2 Single-Ended Low-Noise Amplifiers
153(16)
5.2.1 Popular Topologies
154(3)
5.2.2 The Cascode Topology
157(1)
5.2.3 Modeling and Equations of the Cascode Configuration
158(10)
5.2.4 Two-Port Parameters
168(1)
5.2.5 Single-Ended Topologies for Millimeter-Wave Application
169(1)
5.3 Differential Low-Noise Amplifiers
169(3)
5.4 Concluding Remarks
172(3)
References
172(3)
6 Broadband Low-Noise Amplifiers
175(32)
6.1 Popular Broadband Topologies
176(4)
6.1.1 Traditional Configurations: Common-Source and Cascode Low-Noise Amplifiers
176(2)
6.1.2 Feedback Configurations
178(1)
6.1.3 Cascaded Low-Noise Amplifiers
178(2)
6.2 Modeling and Equations
180(8)
6.2.1 Cascode Low-Noise Amplifiers
180(2)
6.2.2 Resistive Feedback Configuration
182(2)
6.2.3 LC-Ladder Low-Noise Amplifiers with Capacitive Shunt-Shunt Feedback
184(4)
6.3 Two Port Parameters
188(1)
6.4 Wideband Matching Techniques
188(4)
6.5 Multi-stage Topologies for Millimeter-Wave Applications
192(1)
6.6 Distributed and Inductive-Peaking Techniques for Bandwidth Expansion
193(5)
6.7 Other Broadband Techniques
198(3)
6.8 Concluding Remarks
201(6)
References
202(5)
Part II Research Execution: State-of-the-Art Low-Noise Amplifiers, Techniques for of Optimization of Low-Noise Amplifier Parts
7 State-of-the-Art Low-Noise Amplifiers in the Millimeter-Wave Regime
207(46)
7.1 State-of-the-Art Cascode Configurations
208(9)
7.1.1 A 60-GHz BiCMOS Low-Noise Amplifier Deploying a Conductive Path to Ground
208(1)
7.1.2 A 77-GHz BiCMOS Low-Power Low-Noise Amplifier
209(2)
7.1.3 A 33--34 GHz Narrowband Low-Noise Amplifier with Low Noise Figure
211(1)
7.1.4 A 70--100 GHz Wideband Low-Noise Amplifier with Split Inductor Output Matching
212(1)
7.1.5 Triple and Quadruple CMOS Cascode Low-Noise Amplifiers
213(2)
7.1.6 A 60-GHz Two-Stage Cascode CMOS Low-Noise Amplifier with Middle Inductors
215(1)
7.1.7 Other Configurations
215(2)
7.1.8 Performance Analysis
217(1)
7.1.9 Weaknesses of the State-of-the-Art Configurations
217(1)
7.2 State-of-the-Art Differential Configurations
217(6)
7.2.1 120-GHz BiCMOS Two-Stage Differential Cascode Low-Noise Amplifier
218(1)
7.2.2 120-GHz CMOS Transformer-Matched Four-Stage Common Source Low-Noise Amplifier
219(1)
7.2.3 Load-Isolated Transformer-Feedback CMOS Low-Noise Amplifier at 60 GHz
220(1)
7.2.4 Performance Analysis
221(1)
7.2.5 Weaknesses of the State-of-the-Art Configurations
221(2)
7.3 Complex Wideband State-of-the-Art Configurations
223(17)
7.3.1 A Linear Low-Power-Consumption BiCMOS Two-Stage Transformer-Coupled Cascode-Cascade Low-Noise Amplifier
223(1)
7.3.2 Three-Stage Low-Power CMOS Low-Noise Amplifier with High Gm × Rout Transconductance Cells
224(1)
7.3.3 W-Band Low-Noise Amplifier for Millimeter-Wave Imaging Applications
225(2)
7.3.4 71--86-GHz BiCMOS Low-Noise Amplifier as Part of a Bidirectional Power Amplifier/Low-Noise Amplifier System
227(1)
7.3.5 A 71-81 GHz CMOS Low-Noise Amplifier
228(1)
7.3.6 An E-Band pHEMT GaAs Low-Noise Amplifier
229(2)
7.3.7 A Q/V-Band pHEMT GaAs Low-Noise Amplifier with Noise Figure Less Than 2 dB
231(1)
7.3.8 A 68--110-GHz InP HEMT Common-Gate Low-Noise Amplifier
232(1)
7.3.9 A 30-GHz-Wide Low-Noise Amplifier Using a Pole-Converging Interstage Bandwidth Extension Technique
233(4)
7.3.10 A 190-GHz BiCMOS Low-Noise Amplifier for Ultra-Large Bandwidth Applications
237(1)
7.3.11 Other Configurations
238(1)
7.3.12 Performance Analysis
238(2)
7.3.13 Weaknesses of the State-of-the-Art Configuration
240(1)
7.4 State-of-the-Art Configurations Reaching Beyond 200 GHz
240(7)
7.4.1 A 245 GHz Narrowband BiCMOS Low-Noise Amplifier
240(2)
7.4.2 160--270 GHz InP HEMT Low-Noise Amplifiers
242(2)
7.4.3 A Common-Source and Cascode mHEMT Low-Noise Amplifier for Applications at 325 GHz
244(1)
7.4.4 A 670 GHz InP HEMT Low-Noise Amplifier
245(1)
7.4.5 Performance Analysis
246(1)
7.4.6 Weaknesses of the State-of-the Art Configuration
247(1)
7.5 Low-Noise Amplifier Optimization
247(2)
7.6 Concluding Remarks
249(4)
References
250(3)
8 Advanced Low-Noise Amplifier Optimization Topics
253(34)
8.1 General Considerations Leading to Optimum Low-Noise Amplifier Designs
254(8)
8.1.1 Component and Interstage Connection Losses
254(1)
8.1.2 Uncertainty
255(1)
8.1.3 Feasibility of Component Values
255(1)
8.1.4 Influence of the Frequency and the Wavelength
256(1)
8.1.5 Coupling
256(2)
8.1.6 Design Rule Checks and Technology Considerations
258(1)
8.1.7 Layout Dependency
258(1)
8.1.8 Bond-Pad Considerations
259(1)
8.1.9 Bond-Wire Considerations
260(1)
8.1.10 Package Leads Considerations
260(2)
8.2 Optimization Through Improved Packaging
262(5)
8.2.1 Wafer-Level Chip-Scale Packaging (Microbumping)
262(1)
8.2.2 IC/Package Co-design
263(1)
8.2.3 System on Chip
263(1)
8.2.4 System on Package and System in Package
264(2)
8.2.5 Embedded Wafer Level Ball Grid Array Packaging
266(1)
8.3 Advanced Fabrication Techniques
267(4)
8.4 Minimizing Passive Parasitic Effects
271(13)
8.4.1 Passive Components on Chip
271(7)
8.4.2 Embedded Passive Components
278(3)
8.4.3 LNA/Antenna Co-design with Integrated Antennas and Antennas on Package
281(1)
8.4.4 Switches and Tunability
282(2)
8.5 Concluding Remarks
284(3)
References
284(3)
9 Low-Noise Amplifier Optimization via Electronic Design Automation
287(42)
9.1 Current State of Electronic Design Automation
288(3)
9.2 Optimum Design of Passive Components
291(16)
9.2.1 Performance Optimization by Synthesizing Optimum Spiral Inductors and Transformers
291(10)
9.2.2 Offline Optimization of RF Inductors by Introducing Optimal Performance Trade-Offs
301(2)
9.2.3 Optimum Design of Bond Wires
303(2)
9.2.4 Streamlined Design of Transmission-Line Passives
305(2)
9.3 Optimum Design of Matching Networks
307(5)
9.4 Low-Noise Amplifier Electronic Design Automation Techniques
312(12)
9.4.1 Optimizing Low-Noise Amplifiers by Optimizing S-Parameters with and Without the Backtracking Search
312(4)
9.4.2 Simulation-Based Evolutionary LNA Design Optimization
316(1)
9.4.3 Offline Optimization of LNAs
317(1)
9.4.4 In-House Techniques for Streamlining and Optimization of Low-Noise Amplifier Designs
318(1)
9.4.5 CMOS Low-Noise Amplifier Optimization Based on Regions of Operation
319(4)
9.4.6 Complete Low-Noise Amplifier Integration
323(1)
9.5 Receiver Design Using Computational Intelligence
324(3)
9.5.1 Choosing Receiver Topology
326(1)
9.5.2 Receiver Chain Parameter Distribution
326(1)
9.6 Concluding Remarks
327(2)
References
328(1)
10 Evaluation of the Hypothesis and Research Questions, Final Remarks and Future Research
329(5)
10.1 Evaluation of the Hypothesis and Research Questions
329(2)
10.1.1 Research Question 1
329(1)
10.1.2 Research Question 2
329(1)
10.1.3 Research Question 3
330(1)
10.1.4 Research Question 4
330(1)
10.1.5 The Hypothesis
330(1)
10.2 Remaining Research Gaps and Opportunities for Enhancement
331(1)
10.3 Future Directions
332(1)
10.4 Concluding Proposal: Streamlined Flow for Low-Noise Amplifier Design Deploying Custom Electronic Design Automation
332(2)
Reference 334
Saurabh Sinha is full professor of Electronics at the University of Johannesburg, South Africa, where he has been Executive Dean of the Faculty of Engineering and Built Environment since 2013. In addition he is the managing editor of the South African Institute of Electrical Engineers (SAIEE) Africa Research Journal.