Preface |
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xi | |
Introduction |
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xv | |
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Chapter 1 Control Strategies and CAD Approach |
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1 | (92) |
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2 | (6) |
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1.2 Operation principle of three non-isolated converters |
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8 | (5) |
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1.2.1 Buck converter operation |
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8 | (2) |
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1.2.2 Boost converter operation |
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10 | (1) |
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1.2.3 Buck-boost converter operation |
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11 | (2) |
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13 | (16) |
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1.3.1 MOSFET switching an inductive load |
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13 | (5) |
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1.3.2 Extracting the parasitic capacitance values using simulations |
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18 | (1) |
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1.3.3 Power-stage design issues |
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19 | (2) |
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1.3.4 Segmented power stage and multiphase operation |
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21 | (1) |
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1.3.5 LC filter design space |
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22 | (7) |
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29 | (34) |
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1.4.1 Voltage-mode control of the buck converter |
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29 | (6) |
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1.4.2 The RHP zero of the boost converter |
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35 | (2) |
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1.4.3 Current-mode control |
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37 | (3) |
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1.4.4 Hysteretic and sliding-mode control |
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40 | (5) |
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1.4.5 Ripple-based controls for fast dynamics |
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45 | (7) |
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1.4.6 V1 concept: description and applicability |
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52 | (7) |
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1.4.7 Overview of the synchronization of asynchronous modulations |
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59 | (3) |
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1.4.8 PFM -- pulse skipping: burst modes |
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62 | (1) |
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1.5 Minimum voltage deviation controller |
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63 | (6) |
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64 | (3) |
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1.5.2 Integrated circuit implementation and experimental results |
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67 | (2) |
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1.6 CAD tools for PwrSoC design and optimization |
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69 | (22) |
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1.6.1 Overview of the CAD requirements |
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71 | (2) |
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1.6.2 Loss models for integrated inductors and semiconductors |
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73 | (9) |
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1.6.3 Optimization algorithms |
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82 | (2) |
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1.6.4 Outcome of the optimization (topology, area, loss, fsw, detailed design) |
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84 | (3) |
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1.6.5 Impact of technology |
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87 | (4) |
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91 | (2) |
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Chapter 2 Magnetic Components for Increased Power Density |
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93 | (40) |
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2.1 Commercial and research trends towards PwrSiP and PwrSoC |
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96 | (8) |
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104 | (14) |
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2.2.1 Micro-inductor structures |
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104 | (7) |
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2.2.2 Magnetic materials and processing for thin film integrated micro-magnetic devices |
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111 | (7) |
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2.3 Figures of merit for performance of integrated magnetics |
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118 | (5) |
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2.3.1 Figure of merit -- DC performance |
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118 | (5) |
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2.3.2 Figure of merit and AC performance |
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123 | (1) |
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2.4 Technology roadmap and challenges |
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123 | (7) |
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124 | (2) |
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2.4.2 PwrSoC supply chain challenges |
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126 | (1) |
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2.4.3 PwrSoC technology platform |
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127 | (1) |
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2.4.4 Integrated magnetic devices for PwrSoC -- opportunities |
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128 | (2) |
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130 | (2) |
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132 | (1) |
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Chapter 3 Dielectric Components for Increased Power Density |
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133 | (24) |
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133 | (2) |
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3.2 Basics of dielectric physics |
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135 | (5) |
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135 | (1) |
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3.2.2 Polarization, dipole and capacitance |
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135 | (1) |
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3.2.3 Polarization mechanisms in dielectrics |
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136 | (3) |
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3.2.4 Losses in dielectrics |
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139 | (1) |
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3.3 Silicon integrated capacitors |
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140 | (5) |
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3.3.1 Integrated capacitors for enhanced performance |
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141 | (4) |
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3.4 Integrated capacitors for enhanced reliability |
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145 | (5) |
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3.4.1 Dielectric processing |
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145 | (4) |
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3.4.2 Lifetime considerations |
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149 | (1) |
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3.5 Integrated capacitor optimization for power switching |
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150 | (4) |
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150 | (1) |
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3.5.2 Broad band modeling |
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150 | (3) |
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3.5.3 Capacitance parasitic suppression |
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153 | (1) |
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154 | (3) |
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Chapter 4 On-board Power Management DC/DC Inductive Converter |
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157 | (22) |
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157 | (4) |
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4.1.1 Load-related requirements |
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158 | (1) |
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4.1.2 System-related requirements |
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159 | (2) |
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4.1.3 Power delivery network |
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161 | (1) |
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4.2 Current-mode sliding-mode control implementation |
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161 | (13) |
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4.2.1 System analysis: voltage regulation loops |
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162 | (5) |
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4.2.2 System analysis: loop delay control |
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167 | (1) |
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4.2.3 System analysis: switching frequency control |
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168 | (1) |
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169 | (3) |
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172 | (2) |
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174 | (5) |
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Chapter 5 On-Chip Power Management DC/DC Switched-Capacitor Converter |
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179 | (34) |
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180 | (10) |
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180 | (2) |
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182 | (1) |
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5.1.3 Steady-state modeling |
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183 | (7) |
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190 | (3) |
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190 | (2) |
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192 | (1) |
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193 | (11) |
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5.3.1 Research scope and main focus |
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194 | (1) |
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194 | (1) |
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5.3.3 The point-of-load (POL) application |
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195 | (9) |
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204 | (9) |
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5.4.1 Landscape of demonstrated solutions |
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204 | (3) |
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5.4.2 Selected architecture |
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207 | (6) |
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Chapter 6 High-Switching Frequency Inductive DC/DC Converters |
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213 | (36) |
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6.1 Context and topologies |
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214 | (11) |
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6.1.1 Discussion on figures of merit |
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219 | (5) |
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6.1.2 Outstanding state-of-the-art performances |
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224 | (1) |
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225 | (4) |
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6.3 High-quality decoupling |
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229 | (3) |
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6.4 Design considerations for passive components |
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232 | (3) |
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6.5 Integrated inductor characterization |
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235 | (11) |
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6.5.1 Harmonic characterization |
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235 | (2) |
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6.5.2 Time-domain characterization |
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237 | (5) |
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6.5.3 Converter experimental characterization |
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242 | (4) |
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246 | (1) |
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247 | (2) |
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Chapter 7 Hybrid and Multi-level Converter Topologies for On-Chip Implementation of Reduced Voltage-Swing Converters |
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249 | (36) |
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Sheikh Mohammad Ahsanuzzaman |
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249 | (5) |
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7.1.1 Inductor volume reduction through voltage swing minimization |
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251 | (3) |
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7.2 Cascaded hybrid SC-inductive topologies |
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254 | (8) |
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7.2.1 Merged switched-capacitor multi-phase buck (MSCB) converter |
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255 | (7) |
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7.3 Hybrid serial input/output converters |
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262 | (7) |
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7.3.1 HSI/O power processing efficiency and power division |
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265 | (2) |
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7.3.2 Switched-capacitor conversion ratio |
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267 | (2) |
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73.3 Passive volume and switch voltage stress |
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269 | (1) |
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7.4 An on-chip integrated high-density power management solution for portable applications based on a multi-output switched-capacitor circuit |
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270 | (9) |
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7.5 Multi-level and flying capacitor multi-level converters |
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279 | (3) |
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282 | (3) |
Bibliography |
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285 | (26) |
List of Acronyms |
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311 | (4) |
List of Authors |
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315 | (2) |
Index |
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317 | |