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E-raamat: Radio Frequency System Architecture and Design

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  • Formaat: 318 pages
  • Ilmumisaeg: 31-Jan-2013
  • Kirjastus: Artech House Publishers
  • ISBN-13: 9781608075386
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Radio Frequency System Architecture and DesignSuurem pilt
  • Formaat: 318 pages
  • Ilmumisaeg: 31-Jan-2013
  • Kirjastus: Artech House Publishers
  • ISBN-13: 9781608075386
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Communication devices such as smart phones, GPS systems, and Bluetooth, are now part of our daily lives more than ever before. As our communication equipment becomes more sophisticated, so do the radios and other hardware required to enable that technology. Common radio architectures are required to make this technology work seamlessly. This resource describes practical aspects of radio frequency communications systems design, bridging the gap between system-level design considerations and circuit-level design specifications. Industry experts not only provide detailed calculations and theory to determine block level specifications, but also discuss basic theory and operational concepts. This resource also includes extensive, up-to-date application examples. It is suitable for radio frequency systems designers, engineers, and researchers.
Preface xi
Chapter 1 Introduction to RF Systems Design
1(8)
1.1 Introduction
1(1)
1.2 What is a Radio and Why Do We Need One?
1(1)
1.3 The Radio Spectrum
2(1)
1.4 A Communication Device
3(3)
1.5 Baseband Signal Processing Versus RFIC Design
6(1)
1.6 Overview
7(1)
References
8(1)
Chapter 2 An Introduction to Communication Systems
9(70)
2.1 A Simple Digital Communication System
10(2)
2.2 Basic Modulation Schemes
12(4)
2.2.1 Amplitude Shift Keying (ASK)
12(1)
2.2.2 Phase Shift Keying (PSK)
13(2)
2.2.3 Frequency Shift Keying (FSK)
15(1)
2.2.4 Quadrature Amplitude Modulation (QAM)
16(1)
2.3 Signal Models
16(8)
2.3.1 Complex Lowpass Equivalent Signal Representation
16(1)
2.3.2 Signal Space Diagrams
17(7)
2.4 System Model
24(7)
2.4.1 Symbol Map
25(1)
2.4.2 Pulse Shaping Filter
25(1)
2.4.3 Modulator
26(1)
2.4.4 Additive White Gaussian Noise (AWGN) Channel Model
26(1)
2.4.5 Demodulator
27(1)
2.4.6 Receive Filter
27(1)
2.4.7 Signal Sampling
28(1)
2.4.8 Decision Device
29(2)
2.5 Probability of Error Analysis
31(11)
2.5.1 Binary Signaling
31(5)
2.5.2 M-ary Signaling
36(3)
2.5.3 BER Comparison of Different Modulation Schemes
39(3)
2.6 Signal Spectral Density
42(11)
2.6.1 Signal Bandwidth
44(1)
2.6.2 Pulse Shaping and Intersymbol Interference
45(6)
2.6.3 Frequency Division Multiple Access
51(2)
2.7 Wireless Channel Models
53(10)
2.7.1 Signal Attenuation
53(3)
2.7.2 Propagation Delay
56(3)
2.7.3 Multipath Interference and Fading
59(4)
2.8 Advanced Communication Techniques
63(13)
2.8.1 Orthogonal Frequency Division Multiplexing
63(5)
2.8.2 Multiple Antenna Systems
68(3)
2.8.3 Spread Spectrum Systems
71(2)
2.8.4 Error Control Coding
73(3)
2.9 Summary
76(1)
References
77(2)
Chapter 3 Basic RF Design Concepts and Building Blocks
79(50)
3.1 Introduction
79(1)
3.2 Gain
79(1)
3.3 Noise
80(9)
3.3.1 Thermal Noise
80(1)
3.3.2 Available Noise Power
81(1)
3.3.3 Available Noise Power from an Antenna
82(1)
3.3.4 The Concept of Noise Figure
83(3)
3.3.5 Phase Noise
86(3)
3.4 Linearity and Distortion in RF Circuits
89(29)
3.4.1 Power Series Expansion
89(5)
3.4.2 Third-Order Intercept Point
94(2)
3.4.3 Second-Order Intercept Point
96(1)
3.4.4 Fifth-Order Intercept Point
97(1)
3.4.5 The 1-dB Compression Point
97(2)
3.4.6 Relationships Between 1-dB Compression and IP3 Points
99(1)
3.4.7 Broadband Measures of Linearity
100(2)
3.4.8 Nonlinearity with Feedback
102(3)
3.4.9 Nonlinear Systems with Memory: Volterra Series
105(13)
3.5 Basic RF Building Blocks
118(8)
3.5.1 Low Noise Amplifiers (LNAs)
119(1)
3.5.2 Mixers
119(2)
3.5.3 Filters
121(1)
3.5.4 Voltage-Controlled Oscillators and Frequency Synthesizers
122(1)
3.5.5 Variable Gain Amplifiers
122(1)
3.5.6 Power Amplifiers
122(2)
3.5.7 Phase Shifters
124(2)
3.5.8 Analog-to-Digital (A/D) and Digital-to-Analog (D/A) Converters
126(1)
3.5.9 RF Switch
126(1)
3.5.10 Antenna
126(1)
References
126(3)
Chapter 4 System-Level Architecture
129(30)
4.1 Introduction
129(1)
4.2 Superheterodyne Transceivers
129(4)
4.3 Direct Conversion Transceivers
133(2)
4.4 Offset Phase Locked Loop (PLL) Transmitters
135(1)
4.5 Low IF Transceiver
136(6)
4.6 Sliding IF Transceiver
142(1)
4.7 An Upconversion-Downconversion Receiver Architecture
143(1)
4.8 Coherent Versus Noncoherent Receivers
144(1)
4.9 Image Rejecting/Sideband Suppression Architectures
145(2)
4.10 An Alternative Single-Sideband Mixer
147(1)
4.11 Image Rejection with Amplitude and Phase Mismatch
147(2)
4.12 LO Generation
149(3)
4.13 Channel Selection at RF
152(1)
4.14 Transmitter Linearity Techniques
153(2)
4.15 Multiple-Input Multiple-Output (MIMO) Radio Architectures
155(2)
References
157(2)
Chapter 5 System-Level Design Considerations
159(48)
5.1 Introduction
159(1)
5.2 The Noise Figure of Components in Series
159(4)
5.3 The Linearity of Components in Series
163(2)
5.4 Dynamic Range
165(1)
5.5 Image Signals and Image Reject Filtering
166(5)
5.6 Blockers and Blocker Filtering
171(4)
5.7 The Effect of Phase Noise and LO Spurs on SNR in a Receiver
175(1)
5.8 DC Offset
176(1)
5.9 Second-Order Nonlinearity Issues
177(1)
5.10 Automatic Gain Control Issues
178(1)
5.11 Frequency Planning Issues
179(8)
5.11.1 Dealing with Spurs in Frequency Planning
181(6)
5.12 EVM in Transmitters Including Phase Noise, Linearity, IQ Mismatch, EVM with OFDM Waveforms, and Nonlinearity
187(9)
5.13 Adjacent Channel Power
196(3)
5.14 Important Considerations in Analog-to-Digital Converters (ADC) and Digital-to-Analog Converters (DAC)
199(1)
5.15 ADC and DAC Basics
200(6)
References
206(1)
Chapter 6 Frequency Synthesis
207(60)
6.1 Introduction
207(1)
6.2 Integer-N PLL Synthesizers
207(2)
6.3 PLL Components
209(6)
6.3.1 Voltage-Controlled Oscillators (VCOs) and Dividers
209(1)
6.3.2 Phase Detectors
210(4)
6.3.3 The Loop Filter
214(1)
6.4 Continuous-Time Analysis for PLL Synthesizers
215(5)
6.4.1 Simplified Loop Equations
215(3)
6.4.2 PLL System Frequency Response and Bandwidth
218(1)
6.4.3 Complete Loop Transfer Function Including C2
219(1)
6.5 Discrete Time Analysis for PLL Synthesizers
220(2)
6.6 Transient Behavior of PLLs
222(17)
6.6.1 PLL Linear Transient Behavior
223(3)
6.6.2 Nonlinear Transient Behavior
226(6)
6.6.3 Various Noise Sources in PLL Synthesizers
232(3)
6.6.4 In-Band and Out-of-Band Phase Noise in PLL Synthesis
235(4)
6.7 Reference Feedthrough
239(3)
6.8 Fractional-N Frequency Synthesizers
242(6)
6.8.1 Fractional-N Synthesizer with Dual Modulus Prescaler
243(2)
6.8.2 Fractional-N Synthesizer with Multimodulus Divider
245(1)
6.8.3 Fractional-N Spurious Components
246(2)
6.9 All-Digital Phase Locked Loops
248(14)
6.9.1 The Evolution to a More Digital Architecture
249(1)
6.9.2 Phase Noise Limits Due to TDC Resolution
250(1)
6.9.3 Phase Noise Limits Due to DCO Resolution
251(1)
6.9.4 Time to Digital Converter Architecture
251(3)
6.9.5 The Digital Loop Filter
254(5)
6.9.6 ADPLL Noise Calculations
259(1)
6.9.7 Time to Digital Converter Circuits
260(2)
References
262(5)
Chapter 7 Block-Level Radio Design Examples
267(22)
7.1 An IEEE 802.11n Transceiver for the 5-GHz Band
267(14)
7.1.1 Baseband Signal Processing
267(4)
7.1.2 RF Considerations
271(10)
7.2 A Basic GPS Receiver Design
281(6)
7.2.1 GPS Overview
281(3)
7.2.2 RF Specification Calculations
284(3)
References
287(2)
About the Authors 289(2)
Index 291
John W. M. Rogers is an associate professor of engineering at Carleton University, Ottawa, Canada. He earned his Ph.D. in electrical engineering from Carleton University. Calvin Plett is a professor and chair member of the department of electronics at Carleton University, Ottawa, Canada. He earned his Ph.D. in electrical engineering from Carleton University. Ian Marsland is an associate professor in the department of systems and computer engineering at Carleton University, Ottawa, Canada. He earned his Ph.D. in electrical engineering from University of British Columbia.
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