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E-raamat: Time-Triggered Communication

Edited by (Vienna University of Technology, Austria)
  • Formaat: 575 pages
  • Sari: Embedded Systems
  • Ilmumisaeg: 03-Sep-2018
  • Kirjastus: CRC Press Inc
  • Keel: eng
  • ISBN-13: 9781351833400
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Time-Triggered CommunicationSuurem pilt
  • Formaat: 575 pages
  • Sari: Embedded Systems
  • Ilmumisaeg: 03-Sep-2018
  • Kirjastus: CRC Press Inc
  • Keel: eng
  • ISBN-13: 9781351833400
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Time-Triggered Communication helps readers build an understanding of the conceptual foundation, operation, and application of time-triggered communication, which is widely used for embedded systems in a diverse range of industries. This book assembles contributions from experts that examine the differences and commonalities of the most significant protocols including: TTP, FlexRay, TTEthernet, SAFEbus, TTCAN, and LIN.

Covering the spectrum, from low-cost time-triggered fieldbus networks to ultra-reliable time-triggered networks used for safety-critical applications, the authors illustrate the inherent benefits of time-triggered communication in terms of predictability, complexity management, fault-tolerance, and analytical dependability modeling, which are key aspects of safety-critical systems. Examples covered include FlexRay in cars, TTP in railway and avionic systems, and TTEthernet in aerospace applications. Illustrating key concepts based on real-world industrial applications, this book:





Details the underlying concepts and principles of time-triggered communication Explores the properties of a time-triggered communication system, contrasting its strengths and weaknesses Focuses on the core algorithms applied in many systems, including those used for clock synchronization, startup, membership, and fault isolation Describes the protocols that incorporate presented algorithms Covers tooling requirements and solutions for system integration, including scheduling

The information in this book is extremely useful to industry leaders who design and manufacture products with distributed embedded systems based on time-triggered communication. It also benefits suppliers of embedded components or development tools used in this area. As an educational tool, this material can be used to teach students and working professionals in areas including embedded systems, computer networks, system architectures, dependability, real-time systems, and automotive, avionics, and industrial control systems.

Arvustused

"It is an excellent companion for those who seek to learn more about time-triggered communication or found themselves involved in the conception of time-triggered base solutions and the development of the arising technologies." Richard Zurawski, IEEE Industrial Electronics Magazine, December 2011

List of Figures
xvii
List of Tables
xxiii
Editors xxv
Contributors xxvii
1 Introduction
1(4)
R. Obermaisser
1.1 Scope of the Book
2(1)
1.2 Structure of the Book
3(2)
2 Basic Concepts and Principles of Time-Triggered Communication
5(20)
R. Obermaisser
H. Kopetz
2.1 Introduction
6(1)
2.2 System Structure
6(3)
2.3 Concepts of Dependability
9(3)
2.3.1 Dependability Threats - Failure, Error, Fault
10(1)
2.3.2 Fault Containment
10(1)
2.3.3 Failure Modes
10(1)
2.3.4 Fault Hypothesis
11(1)
2.4 Global Time and State
12(8)
2.4.1 Time and Clocks
13(2)
2.4.2 Precision and Accuracy
15(1)
2.4.3 Global Time
16(1)
2.4.4 Sparse Time
17(2)
2.4.5 State of a System
19(1)
2.5 Autonomous Control of Communication Networks
20(5)
2.5.1 Types of Temporal Control Signals
20(1)
2.5.1.1 Event Triggers
20(1)
2.5.1.2 Time Triggers
21(1)
2.5.2 Information Semantics
21(1)
2.5.3 Temporal Firewall
21(1)
2.5.4 Transport Protocols
22(1)
2.5.5 Flow Control
23(2)
3 Properties of Time-Triggered Communication Systems
25(28)
R. Obermaisser
H. Kopetz
3.1 Introduction
26(1)
3.2 Composability
27(6)
3.2.1 Component-Based Design
27(1)
3.2.2 Component Interfaces
28(1)
3.2.2.1 Linking Interface
28(1)
3.2.2.2 Technology Independent Interface (TII)
29(1)
3.2.2.3 Technology Dependent Interface (TDI)
29(1)
3.2.2.4 Local Interface
29(1)
3.2.3 Linking Interface Specification
30(1)
3.2.4 Composition of Nodes
31(1)
3.2.4.1 Independent Development of Nodes
31(1)
3.2.4.2 Stability of Prior Services
32(1)
3.2.4.3 Non-Interfering Interactions
32(1)
3.2.4.4 Preservation of the Node Abstraction in the Case of Failures
32(1)
3.3 Determinism and Predictability
33(4)
3.3.1 The Concept of Determinism
33(1)
3.3.2 Replica Determinism
34(1)
3.3.2.1 Differing Inputs
35(1)
3.3.2.2 Deviations of Computational Progress Relative to Real Time
35(1)
3.3.2.3 Oscillator Drift
35(1)
3.3.2.4 Preemptive Scheduling
36(1)
3.3.2.5 Nondeterministic Language Features
36(1)
3.3.3 Building a Replica Determinate System
36(1)
3.3.3.1 Sparse Time-Base
36(1)
3.3.3.2 Agreement on Input
36(1)
3.3.3.3 Static Control Structure
37(1)
3.3.3.4 Deterministic Algorithms
37(1)
3.3.3.5 Deterministic Communication System
37(1)
3.4 Diagnosability
37(4)
3.4.1 Detection of Errors and Anomalies
38(1)
3.4.2 Decision Making - Analysis of Diagnostic Information
39(1)
3.4.3 Use of Diagnostic Information and Analysis Results
40(1)
3.5 Certifiability
41(4)
3.5.1 Safety Case
41(2)
3.5.2 Modular Certification
43(1)
3.5.3 Certification in Application Domains
43(1)
3.5.4 Time-Triggered Communication Protocols and Certification
44(1)
3.6 Fault Containment and Error Containment
45(3)
3.6.1 Independent Fault Containment Regions
46(1)
3.6.2 Strict Control on Node Interactions
46(1)
3.6.3 Replica Determinism
47(1)
3.6.4 Recovery and Repair
47(1)
3.7 Performance
48(5)
3.7.1 Periodic, Sporadic and Aperiodic Messages
48(1)
3.7.2 Performance Attributes
49(4)
4 Core Algorithms
53(40)
M. Paulitsch
W. Steiner
R. Obermaisser
C. El Salloum
4.1 Introduction
54(1)
4.2 Clock Synchronization
55(13)
4.2.1 Principle of Operation of Clock Synchronization
56(1)
4.2.1.1 Resynchronization Initiation
57(1)
4.2.1.2 Remote Clock Time Readings
57(1)
4.2.1.3 Convergence Functions
58(1)
4.2.2 Classifications of Clock Synchronization Algorithms
59(2)
4.2.3 Limits in and Performance of Clock Synchronization Algorithms
61(1)
4.2.4 Related Work on Clock Synchronization Algorithms
61(4)
4.2.5 Time Standards and Sources
65(1)
4.2.5.1 Time Standards
65(1)
4.2.5.2 Time Sources
66(1)
4.2.6 Time Aspects from an Application-Specific View
67(1)
4.3 Startup and Restart
68(12)
4.3.1 Introduction and Overview
68(2)
4.3.2 Startup
70(1)
4.3.2.1 Integration
71(3)
4.3.2.2 Coldstart
74(3)
4.3.3 Restart
77(1)
4.3.3.1 Clique Detection Algorithms
78(2)
4.4 Integration of Event-Triggered and Time-Triggered Communication
80(8)
4.4.1 Integration of Event-Triggered and Time-Triggered Communication at MAC Layer
81(1)
4.4.1.1 Event-Triggered and Time-Triggered Communication --- Contention Avoidance
81(1)
4.4.1.2 Event-Triggered and Time-Triggered Communication --- Contention Detection with Preemption
82(1)
4.4.1.3 Event-Triggered and Time-Triggered Communication --- Contention Tolerance
83(1)
4.4.2 Event-Triggered Overlay Networks
83(1)
4.4.3 Generic Event Service
84(1)
4.4.3.1 Higher Protocols: CORBA Internet Inter-ORB Protocol
85(1)
4.4.3.2 Higher Protocols: Controller Area Network (CAN)
85(3)
4.5 Diagnostic Services
88(5)
4.5.1 Error Detection
88(1)
4.5.1.1 Error Detection by Syntactic Checks
89(1)
4.5.1.2 Error Detection by Semantic Checks
89(1)
4.5.1.3 Error Detection by Active Redundancy
90(1)
4.5.2 Membership Agreement
90(3)
5 Time-Triggered Protocol (TTP/C)
93(28)
R. Obermaisser
5.1 Protocol Overview
94(1)
5.2 Protocol Services
95(13)
5.2.1 Communication Services
96(1)
5.2.1.1 Temporal Structuring of Communication
96(1)
5.2.1.2 Timing of a TDMA Slot
97(1)
5.2.1.3 Frame Types and States
98(1)
5.2.2 Clock Synchronization
99(1)
5.2.3 Restart, Re-Integration, Integration
100(1)
5.2.4 Diagnostic Services
101(1)
5.2.4.1 Life-Sign
101(1)
5.2.4.2 Membership Service
102(2)
5.2.4.3 Clique Detection
104(1)
5.2.4.4 Communication System Blackout Detection
104(1)
5.2.5 Fault Isolation
104(2)
5.2.6 Configuration Services
106(1)
5.2.6.1 Mode Changes
106(1)
5.2.6.2 Boot Loader
107(1)
5.3 Protocol Parameterization
108(2)
5.3.1 Message Descriptor List
108(2)
5.4 Communication Interface
110(4)
5.4.1 Status Area
110(3)
5.4.2 Control Area
113(1)
5.4.2.1 Message Area
114(1)
5.5 Protocol States
114(2)
5.6 Validation and Verification Efforts
116(3)
5.6.1 Formal Analysis of Clock Synchronization Algorithm
116(1)
5.6.2 Formal Analysis of Fault Isolation and Consistency
117(1)
5.6.3 Formal Analysis of Membership Service and Clique Avoidance
117(1)
5.6.4 Fault Injection Experiments
118(1)
5.7 Example Configurations and Implementations
119(2)
6 FlexRay
121(32)
C. El Salloum
K. Bilic
6.1 Protocol Overview
122(1)
6.2 Protocol Services
122(15)
6.2.1 Communication Services
122(1)
6.2.1.1 Temporal Structuring of Communication
123(3)
6.2.1.2 Frame Format
126(3)
6.2.1.3 Coding and Decoding
129(1)
6.2.2 Protocol Operation Control
130(2)
6.2.3 Clock Synchronization
132(1)
6.2.3.1 Global and Local Time
132(1)
6.2.3.2 Synchronization Process
132(2)
6.2.4 Wakeup and Startup
134(1)
6.2.4.1 Wakeup
134(1)
6.2.4.2 Startup
135(2)
6.3 Diagnostic Services and Fault Isolation
137(3)
6.3.1 Redundant Communication Channels
137(1)
6.3.2 Bus Guardians
137(1)
6.3.2.1 Local Bus Guardian
138(1)
6.3.2.2 Central Bus Guardian
139(1)
6.3.3 Checks on the Reception of a Frame
139(1)
6.4 Protocol Parameterization
140(2)
6.4.1 Cluster Parameters
140(1)
6.4.2 Node Parameters
141(1)
6.5 Controller Host Interface
142(6)
6.5.1 Overview of the E-Ray IP Module
142(2)
6.5.2 Programmers Model
144(1)
6.5.2.1 Assignment of Message Buffers
144(1)
6.5.2.2 Structure of the Message RAM
145(1)
6.5.2.3 Message Handling
146(2)
6.6 Example Configurations and Implementations
148(5)
6.6.1 Topology and Layout of a FlexRay Network
148(1)
6.6.1.1 Passive Bus Topology
148(1)
6.6.1.2 Active Star Topology
149(1)
6.6.1.3 Hybrid Network
149(4)
7 SAFEbus
153(28)
M. Paulitsch
K. Driscoll
7.1 SAFEbus
154(1)
7.1.1 Background
154(1)
7.2 Protocol Overview
155(2)
7.3 Protocol Services
157(19)
7.3.1 Communication Services
157(2)
7.3.1.1 Determinism and Partitioning
159(1)
7.3.1.2 Data-Message Structure
160(1)
7.3.1.3 Bus Encoding
161(1)
7.3.1.4 Out-of-Band Signaling Pulses
162(1)
7.3.2 Clock Synchronization
163(1)
7.3.3 Restart, Re-Integration, Integration
164(5)
7.3.4 Diagnostic Services
169(1)
7.3.4.1 Debugging Mechanisms
169(1)
7.3.5 Fault Isolation
170(1)
7.3.5.1 Babble Protection
170(1)
7.3.5.2 Byzantine Protection
171(1)
7.3.5.3 Availability vs. Integrity Trade-Off
171(1)
7.3.5.4 Zombie Module Protection
172(1)
7.3.6 Configuration Services
172(1)
7.3.6.1 Frame Changes
172(1)
7.3.7 Protocol Parameterization
173(1)
7.3.7.1 Table Memory
173(1)
7.3.7.2 Frame Description Language
174(1)
7.3.7.3 Table Versioning
174(2)
7.4 Communication Interface
176(2)
7.5 Validation and Verification Efforts
178(1)
7.6 Example Configurations and Implementations
178(3)
8 Time-Triggered Ethernet
181(40)
W. Steiner
G. Bauer
B. Hall
M. Paulitsch
8.1 Protocol Overview
182(2)
8.2 Protocol Services
184(26)
8.2.1 Communication Services
185(1)
8.2.1.1 Communication Modes
185(2)
8.2.1.2 Frame Formats
187(3)
8.2.1.3 Coding and Decoding
190(1)
8.2.1.4 Media Access Control
190(5)
8.2.1.5 Permanence Function
195(1)
8.2.2 Clock Synchronization
196(1)
8.2.2.1 Clock Synchronization Overview
196(1)
8.2.2.2 First Step Convergence: Compression Master
197(3)
8.2.2.3 Second Step Convergence: Synchronization Master
200(1)
8.2.3 Startup and Restart
201(2)
8.2.3.1 Integration
203(1)
8.2.3.2 Coldstart
204(1)
8.2.3.3 Restart
205(1)
8.2.3.4 Clique Detection
205(1)
8.2.4 Diagnostic Services
206(1)
8.2.5 Fault Isolation
207(1)
8.2.5.1 Central Guardian
207(2)
8.2.5.2 High-Integrity Design
209(1)
8.2.6 Configuration Services
210(1)
8.3 Protocol Parameterization
210(3)
8.3.1 Physical Topology
210(1)
8.3.2 Protocol-Control Flow Parameterization
211(1)
8.3.3 Dataflow Parameterization
211(1)
8.3.3.1 Time-Triggered Parameters
212(1)
8.3.3.2 Rate-Constrained Parameters
212(1)
8.3.3.3 Best-Effort Parameters
213(1)
8.4 Communication Interface
213(1)
8.5 Validation and Verification Efforts
214(2)
8.5.1 Formal Verification and Analysis
214(1)
8.5.2 Certified Development Process
215(1)
8.5.3 Model-Based Testing
215(1)
8.6 Example Configurations and Implementations
216(5)
8.6.1 Configurations
216(1)
8.6.1.1 Master-Based Configuration
216(1)
8.6.1.2 Dual-Fault Tolerant Configuration
217(1)
8.6.1.3 System-of-Systems Configuration
217(2)
8.6.2 Implementations
219(2)
9 TTCAN
221(24)
R. Kammerer
9.1 Protocol Overview
221(1)
9.2 Protocol Services
222(17)
9.2.1 Communication Services
222(2)
9.2.2 Clock Synchronization
224(5)
9.2.3 Sending and Receiving Messages in TTCAN
229(1)
9.2.4 Restart, Re-Integration, Integration
230(2)
9.2.5 Diagnostic Services
232(2)
9.2.6 Error Detection and Fault Isolation
234(4)
9.2.7 Configuration Services
238(1)
9.3 Protocol Parameterization
239(2)
9.4 Communication Interface
241(1)
9.5 Validation and Verification Efforts
242(1)
9.6 Example Configurations and Implementations
243(2)
10 LIN
245(10)
W. Elmenreich
10.1 Protocol Overview
245(1)
10.2 Protocol Services
246(1)
10.2.1 Communication Services
246(1)
10.3 LIN 2.x
247(5)
10.3.1 Clock Synchronization
248(1)
10.3.2 Restart, Re-Integration, Integration
248(1)
10.3.3 Diagnostic Services
248(1)
10.3.4 Error Detection and Fault Isolation
249(1)
10.3.5 Configuration Services and Protocol Parameterization
250(2)
10.4 Communication Interface
252(1)
10.5 Validation and Verification Efforts
253(1)
10.6 Example Configurations and Implementations
253(2)
11 TTP/A
255(14)
W. Elmenreich
11.1 Protocol Overview
255(1)
11.2 OMG Smart Transducer Standard
256(1)
11.3 Interface File System (IFS)
256(3)
11.4 Protocol Services
259(5)
11.4.1 Communication Services
259(2)
11.4.2 Clock Synchronization
261(1)
11.4.3 Restart, Re-Integration, Integration
262(1)
11.4.4 Diagnostic Services
262(1)
11.4.5 Fault Isolation
263(1)
11.4.6 Configuration Services and Protocol Parameterization
263(1)
11.5 Communication Interface
264(1)
11.6 Validation and Verification Efforts
265(1)
11.7 Example Configurations and Implementations
265(4)
11.7.1 TTP/A Slave Nodes
265(1)
11.7.2 TTP/A Master
266(3)
12 BRAIN
269(26)
M. Paulitsch
B. Hall
K.R. Driscoll
12.1 Protocol Overview
270(4)
12.1.1 Development History and Design Goals
270(3)
12.1.2 Minimal Overhead Replication and Input Agreement
273(1)
12.2 Protocol Mechanisms and Services
274(12)
12.2.1 High-Integrity Data Propagation
274(1)
12.2.1.1 Self-Checking Data Relay
274(2)
12.2.1.2 Independent Path Data Integrity Reconstitution
276(1)
12.2.1.3 Self-Checking Processor Pair Broadcast
277(2)
12.2.2 Clock Synchronization, Startup and Clique Resolution
279(2)
12.2.2.1 Self-Checking Master Coordination
281(1)
12.2.2.2 Connectivity Building and Clique Aggregation
282(3)
12.2.2.3 Synchronous Mode Clique Aggregation Breakthrough
285(1)
12.3 Fault Isolation
286(5)
12.3.1 Time-Triggered Sequenced Guardian Roles
286(1)
12.3.1.1 Directional Integrity Exchange
287(1)
12.3.1.2 Skip Guardian Link Forwarding
288(1)
12.3.1.3 Self-Checking Pair Neighbor Guardian
288(1)
12.3.2 Asynchronous Guardian Roles
289(1)
12.3.2.1 Startup Enforcement
289(1)
12.3.2.2 Source Authentication
290(1)
12.3.2.3 Additional Guardian Fault Containment Behavior
291(1)
12.4 Diagnostic and Agreement Services
291(1)
12.4.1 Host Task Set Agreement
291(1)
12.5 Validation and Verification Efforts
292(1)
12.6 Example Configurations, Implementations and Deployment Considerations
292(3)
13 ASCB - Avionics Standard Communications Bus
295(8)
M. Paulitsch
13.1 Protocol Overview
295(1)
13.2 Protocol Services
296(4)
13.2.1 Communication Services
296(1)
13.2.2 Clock Synchronization, Restart, Re-Integration and Integration
296(3)
13.2.3 Diagnostic Services
299(1)
13.2.4 Fault Isolation
299(1)
13.2.5 Configuration Services
300(1)
13.3 Protocol Parameterization
300(1)
13.4 Communication Interface
300(1)
13.5 Validation and Verification Efforts
301(1)
13.6 Example Configurations and Implementations
301(2)
14 Industrial Applications
303(58)
M. Paulitsch
E. Schmidt
C. Scherrer
H. Kantz
14.1 Introduction
304(1)
14.2 Time-Triggered Communication in Aerospace
304(29)
14.2.1 Requirements
305(6)
14.2.2 A General Discussion of Time-Triggered Communication to Meet Requirements
311(4)
14.2.3 Use of Time-Triggered Communication Networks in Aerospace and Space
315(1)
14.2.3.1 SAFEbus in Boeing 777
316(5)
14.2.3.2 ASCB in Primus Epic
321(5)
14.2.3.3 Honeywell's Modular Aerospace Controller
326(2)
14.2.3.4 TTEthernet in Orion
328(5)
14.3 Time-Triggered Communication in Automotive Application
333(13)
14.3.1 Typical Design of Automotive Applications
337(2)
14.3.2 Migration from CAN to FlexRay
339(1)
14.3.2.1 Event-Triggered Approach - FlexRay as CAN Replacement
340(2)
14.3.2.2 Time-Triggered Approach --- FlexRay-Synchronous Task Execution
342(2)
14.3.2.3 Discussion
344(1)
14.3.3 Practical Experience with the Time-Triggered Approach in Automotive Subsystems
345(1)
14.4 Time-Triggered Communication Services in Railway Applications
346(15)
14.4.1 Railway Applications
346(2)
14.4.2 Requirements on Railway Applications
348(1)
14.4.3 Requirements on Communication Systems
349(1)
14.4.4 Generic System Architecture
350(1)
14.4.4.1 TAS Control Platform Redundancy Architecture
351(1)
14.4.4.2 TAS Control Platform Communication System
351(2)
14.4.4.3 TAS Control Platform Fault Tolerance Layer
353(1)
14.4.4.4 Connectivity
354(1)
14.4.5 Application of Time-Triggered Protocols in the Railway Domain
355(1)
14.4.5.1 Interlocking: Architecture (Components, Services, Interactions)
355(1)
14.4.5.2 Field Element Controller
356(1)
14.4.5.3 Availability Concept
357(1)
14.4.6 Safety Concept
357(1)
14.4.6.1 Timing Requirements
357(1)
14.4.6.2 TTP-Configuration and Schedule
358(1)
14.4.7 Conclusion and Outlook
359(2)
15 Development Tools
361(134)
P. Pop
A. Goller
T. Pop
P. Eles
15.1 Introduction
363(2)
15.2 Design Tasks
365(3)
15.3 Schedule Generation
368(23)
15.3.1 Requirements and Application Model
371(3)
15.3.1.1 Application Model
374(1)
15.3.2 Scheduling Complexity and Scheduling Strategies
374(2)
15.3.2.1 Incremental Scheduling
376(2)
15.3.2.2 Host Multiplexing
378(2)
15.3.2.3 Dynamic Messaging
380(1)
15.3.2.4 Scheduling Strategies in TTPPlan
381(2)
15.3.3 Schedule Visualization
383(1)
15.3.3.1 The Schedule Browser
384(1)
15.3.3.2 The Schedule Editor
384(3)
15.3.3.3 The Round-Slot Viewer
387(1)
15.3.3.4 Visualization of Message Paths
387(4)
15.4 Holistic Scheduling and Optimization
391(17)
15.4.1 System Model
392(1)
15.4.2 The FlexRay Communication Protocol
393(3)
15.4.3 Timing Analysis
396(1)
15.4.3.1 Schedulability Analysis of DYN Messages
397(4)
15.4.3.2 Holistic Schedulability Analysis of FPS Tasks and DYN Messages
401(1)
15.4.4 Bus Access Optimization
402(2)
15.4.4.1 The Basic Bus Configuration
404(2)
15.4.4.2 Greedy Heuristic
406(1)
15.4.4.3 Simulated Annealing-Based Approach
407(1)
15.4.4.4 Evaluation of Bus Optimization Heuristics
407(1)
15.5 Incremental Design
408(29)
15.5.1 Preliminaries
410(1)
15.5.1.1 System Architecture
410(1)
15.5.1.2 Application Mapping and Scheduling
411(3)
15.5.2 Problem Formulation
414(2)
15.5.3 Characterizing Existing and Future Applications
416(1)
15.5.3.1 Characterizing the Already Running Applications
416(2)
15.5.3.2 Characterizing Future Applications
418(1)
15.5.4 Quality Metrics and Objective Function
419(1)
15.5.4.1 Slack Sizes (the first criterion)
419(2)
15.5.4.2 Distribution of Slacks (the second criterion)
421(1)
15.5.4.3 Objective Function and Exact Problem Formulation
421(1)
15.5.5 Mapping and Scheduling Strategy
422(1)
15.5.5.1 The Initial Mapping and Scheduling
423(1)
15.5.5.2 Iterative Design Transformations
424(3)
15.5.5.3 Minimizing the Total Modification Cost
427(4)
15.5.6 Experimental Results
431(1)
15.5.6.1 Evaluation of the IMS Algorithm and the Iterative Design Transformations
431(4)
15.5.6.2 Evaluation of the Modification Cost Minimization Heuristics
435(2)
15.6 Integration of Time-Triggered Communication with Event-Triggered Tasks
437(18)
15.6.1 Software Architecture
437(1)
15.6.2 Optimization Problem
438(1)
15.6.3 Schedulability Analysis
439(1)
15.6.3.1 Static Single Message Allocation (SM)
440(2)
15.6.3.2 Static Multiple Message Allocation (MM)
442(1)
15.6.3.3 Dynamic Message Allocation (DM)
443(1)
15.6.3.4 Dynamic Packet Allocation (DP)
444(2)
15.6.4 Optimization Strategy
446(1)
15.6.4.1 Greedy Heuristics
447(3)
15.6.4.2 Simulated Annealing Strategy
450(2)
15.6.5 Experimental Results
452(3)
15.7 Configuration and Code Generation
455(22)
15.7.1 Communication Configuration
456(1)
15.7.1.1 TTP --- Personalized MEDLs
456(1)
15.7.1.2 Monitor MEDL for TTP
457(1)
15.7.1.3 Buffer Configuration for FlexRay
457(1)
15.7.2 Middleware Configuration
458(2)
15.7.2.1 Configuration Format
460(1)
15.7.2.2 FlexRay Interface Configuration
461(5)
15.7.2.3 HS-COM Configuration
466(2)
15.7.3 Code Generation
468(1)
15.7.3.1 Feature Configuration
468(4)
15.7.3.2 Implementation
472(4)
15.7.4 Configuration of Third-Party Software
476(1)
15.8 Verification
477(18)
15.8.1 Process Requirements
478(1)
15.8.1.1 DO-178B
479(1)
15.8.1.2 IEC 61508
480(1)
15.8.1.3 ISO 26262
481(1)
15.8.2 Verification Best Practices
482(1)
15.8.2.1 Reuse of Processes
482(1)
15.8.2.2 Extending Checklists
483(1)
15.8.2.3 Use of COTS Products
483(1)
15.8.2.4 Modular Certification
484(1)
15.8.2.5 Requirements Management
484(2)
15.8.2.6 Test Vectors
486(1)
15.8.2.7 Test Suite
486(1)
15.8.3 Verification Tooling Approach
486(1)
15.8.3.1 Output Correctness
486(1)
15.8.3.2 Manual vs. Automated Verification
487(1)
15.8.3.3 Qualification of Verification Tools
488(1)
15.8.3.4 TTPVerify
489(1)
15.8.3.5 TTPTD-COM-Verify
490(5)
Bibliography 495(28)
Index 523
Roman Obermaisser is project manager and docent at the Institute for Computer Engineering, Real-Time Systems Group at Vienna University of Technology.
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