Preface |
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xv | |
Acknowledgments |
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xix | |
1 Phased Arrays |
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1 | (20) |
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1.1 Phased Arrays in Radar and Communication Systems |
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1 | (4) |
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5 | (1) |
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1.3 Antenna Patterns and Line Arrays |
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5 | (1) |
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1.4 Electronically Steerable Antennas |
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6 | (4) |
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1.5 Radar Equation for Targets |
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10 | (1) |
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1.6 Radar Equation for Weather |
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11 | (5) |
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1.7 Phased Arrays for Communication Systems |
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16 | (3) |
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19 | (1) |
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19 | (1) |
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19 | (2) |
2 Transmit/Receive Modules |
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21 | (40) |
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2.1 Introduction to Transmit/Receive Modules |
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21 | (2) |
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2.2 Early T/R Module Development Efforts |
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23 | (1) |
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2.3 MMIC-Based T/R Modules |
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23 | (1) |
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2.4 T/R Module Performance Requirements |
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24 | (2) |
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2.5 T/R Module Components |
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26 | (30) |
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2.5.1 Transmit/Receive Switches |
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26 | (2) |
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28 | (3) |
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31 | (3) |
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34 | (1) |
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34 | (4) |
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38 | (6) |
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2.5.7 Circulator or Duplexer |
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44 | (1) |
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2.5.8 Limiter or Receive Protect Circuit |
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45 | (4) |
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2.5.9 Low-Noise Amplifier |
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49 | (7) |
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2.6 Module Control and Power Conditioning |
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56 | (1) |
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57 | (1) |
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58 | (1) |
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59 | (2) |
3 Semiconductors for T/R Modules |
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61 | (24) |
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61 | (1) |
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3.2 Semiconductor Materials |
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62 | (12) |
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62 | (5) |
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67 | (4) |
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71 | (1) |
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72 | (1) |
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73 | (1) |
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73 | (1) |
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3.3 RF Semiconductor Wafer Fabrication Processes |
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74 | (4) |
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74 | (1) |
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74 | (1) |
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75 | (1) |
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3.3.4 Dielectric Deposition |
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76 | (1) |
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77 | (1) |
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77 | (1) |
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78 | (4) |
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78 | (1) |
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79 | (1) |
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80 | (2) |
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82 | (1) |
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82 | (1) |
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83 | (1) |
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83 | (2) |
4 Signal Integrity Issues in T/R Modules |
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85 | (30) |
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4.1 Introduction to Signal Integrity |
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85 | (2) |
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4.2 Chip-Level Interconnects |
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87 | (15) |
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4.2.1 Wire Bonding Methods |
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87 | (1) |
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88 | (5) |
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93 | (9) |
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4.3 Package/Module-Level Interconnect |
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102 | (2) |
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4.3.1 Module Interconnects |
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102 | (1) |
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4.3.2 SMT Package Interconnects |
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102 | (2) |
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4.4 Transmission Line Interconnects |
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104 | (2) |
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4.5 Coupling Between Interconnects |
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106 | (1) |
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4.6 Vertical Transition Interconnects |
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107 | (2) |
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109 | (3) |
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112 | (1) |
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112 | (1) |
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113 | (2) |
5 Materials for T/R Modules |
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115 | (30) |
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5.1 Introduction to Materials |
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115 | (2) |
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5.2 Electrical Parameters and Their Measurement |
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117 | (10) |
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5.2.1 Dielectric Constant |
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117 | (2) |
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119 | (1) |
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5.2.3 Measurement of Dielectric Constant and Loss Tangent |
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120 | (5) |
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5.2.4 Metal Electrical Conductivity |
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125 | (2) |
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5.3 Mechanical Parameters |
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127 | (2) |
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5.3.1 Thermal Conductivity |
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127 | (2) |
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129 | (8) |
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130 | (1) |
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131 | (3) |
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5.4.3 Thermally Enhanced Thick-Film Processes |
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134 | (1) |
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5.4.4 High-Temperature Co-Fired Ceramic (HTCC) |
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134 | (2) |
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5.4.5 Low-Temperature Co-Fired Ceramic (LTCC) Materials |
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136 | (1) |
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137 | (4) |
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5.5.1 Laminate Board Fabrication |
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137 | (3) |
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5.5.2 High-Performance Laminate Materials |
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140 | (1) |
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5.5.3 Liquid Crystal Polymers |
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140 | (1) |
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5.5.4 MCM-L Laminate Multichip Modules |
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141 | (1) |
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141 | (1) |
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142 | (1) |
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142 | (3) |
6 Heat Issues and Solutions for T/R Modules |
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145 | (22) |
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6.1 Introduction to Thermal Issues and Solutions |
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145 | (1) |
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6.2 Heat Flux in MMIC High-Power Amplifiers |
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146 | (4) |
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6.3 Amplifier Efficiency and Dissipated Thermal Power |
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150 | (2) |
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6.4 Thermal Resistance and Device Junction Temperature |
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152 | (1) |
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6.5 Example of Heat Dissipated by Components in a T/R Module |
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153 | (1) |
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6.6 Reliability Calculations |
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154 | (3) |
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6.7 Diamond-Enhanced GaN High-Power Amplifiers for T/R Modules |
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157 | (2) |
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6.8 Thermal Simulations Using SPICE |
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159 | (2) |
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161 | (3) |
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6.9.1 Electrical Test Methods |
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161 | (1) |
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162 | (1) |
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6.9.3 Temperature Measurements Using Liquid Crystal Thermography |
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163 | (1) |
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6.9.4 Thermal Design Using Surrogate Validation Chips |
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164 | (1) |
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164 | (1) |
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165 | (1) |
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165 | (2) |
7 MMIC Fabrication and T/R Module Manufacturing |
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167 | (18) |
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167 | (1) |
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168 | (6) |
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168 | (2) |
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7.2.2 MMIC Fabrication Processes |
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170 | (3) |
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7.2.3 MMIC Foundry Procedures |
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173 | (1) |
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7.3 T/R Module Manufacturing |
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174 | (9) |
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7.3.1 T/R Module Manufacturing Facilities |
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174 | (1) |
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7.3.2 T/R Module Manufacturing Processes |
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175 | (8) |
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183 | (1) |
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183 | (1) |
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183 | (2) |
8 Testing of MMICs and T/R Modules |
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185 | (20) |
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8.1 Introduction to Testing |
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185 | (1) |
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185 | (7) |
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8.2.1 Incoming Materials Testing |
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185 | (2) |
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187 | (1) |
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8.2.3 On-Wafer RF Testing |
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188 | (2) |
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8.2.4 MMIC Screening Tests |
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190 | (1) |
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8.2.5 MMIC Reliability Testing |
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191 | (1) |
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8.3 T/R Module Specifications |
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192 | (2) |
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194 | (7) |
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8.4.1 Key Electrical Parameters |
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194 | (5) |
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8.4.2 Example of Key Parameter Requirements on an X-Band T/R Module |
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199 | (1) |
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8.4.3 Automated Electrical Test Set |
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200 | (1) |
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201 | (1) |
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201 | (1) |
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202 | (3) |
9 MMIC and T/R Module Cost |
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205 | (14) |
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205 | (1) |
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206 | (6) |
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9.2.1 MMIC Wafer Fabrication Cost |
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206 | (1) |
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9.2.2 Wafer Fabrication Process Yield |
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207 | (2) |
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9.2.3 Wafer Diameter Impact on MMIC Cost |
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209 | (1) |
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9.2.4 Impact of MMIC Fabrication Facility Loading on Cost |
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209 | (1) |
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9.2.5 MMIC Cost Based on Area or Output Power |
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210 | (2) |
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212 | (2) |
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214 | (3) |
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9.4.1 MMIC Cost Reduction |
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214 | (2) |
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9.4.2 T/R Module Cost Reduction |
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216 | (1) |
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217 | (1) |
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217 | (1) |
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218 | (1) |
10 Next-Generation T/R Modules |
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219 | (12) |
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219 | (1) |
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10.2 Single-Chip T/R Module |
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220 | (2) |
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10.3 Wafer-Scale Phased Array |
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222 | (1) |
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10.4 Si-CMOS: The Lowest-Cost Single-Chip T/R |
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222 | (1) |
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223 | (2) |
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10.6 Hybrid Digital/Analog Beam Forming |
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225 | (1) |
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10.7 Switch Beam and Butler Matrix Phased Arrays |
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225 | (1) |
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10.8 Highly Integrated Packaging of T/R Modules |
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226 | (1) |
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10.9 Path to Low-Cost Systems: Open Architectures |
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227 | (1) |
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228 | (1) |
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228 | (1) |
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229 | (2) |
About the Authors |
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231 | (2) |
Index |
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233 | |