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E-raamat: Unique Chips and Systems

Edited by (The University of Texas, San Antonio, USA), Edited by (Austin, Texas, USA)
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Which came first, the system or the chip? While integrated circuits enable technology for the modern information age, computing, communication, and network chips fuel it. As soon as the integration ability of modern semiconductor technology offers presents opportunities, issues in power consumption, reliability, and form-factor present challenges. The demands of emerging software applications can only be met with unique systems and chips. Drawing on contributors from academia, research, and industry, Unique Systems and Chips explores unique approaches to designing future computing and communication chips and systems.

The book focuses on specialized hardware and systems as opposed to general-purpose chips and systems. It covers early conception and simulation, mid-development, application, testing, and performance. The chapter authors introduce new ideas and innovations in unique aspects of chips and system design, then go on to provide in-depth analysis of these ideas. They explore ways in which these chips and systems may be used in further designs or products, spurring innovations beyond the intended scopes of those presented. International in flavor, the book brings industrial and academic perspectives into focus by presenting the full spectrum of applications of chips and systems.
Preface vii
Editors xi
Contributors xiii
Architecture and Implementation of the TRIPS Processor
1(40)
Stephen W. Keckler
Doug Burger
Karthikeyan Sankaralingam
Ramadass Nagarajan
Robert McDonald
Rajagopalan Desikan
Saurabh Drolia
M. S. Govindan
Paul Gratz
Divya Gulati
Heather Hanson
Changkyu Kim
Haiming Liu
Nitya Ranganathan
Simha Sethumadhavan
Sadia Sharif
Premkishore Shivakumar
High-Performance Data Security in an x86 Processor
41(38)
G. Glenn Henry
Terry Parks
Tom Crispin
ARM Cortex-A8: A High-Performance Processor for Low-Power Applications
79(28)
David Williamson
A Rotated Array Clustered Extended Hypercube Processor: The RACE-H™ Processor
107(18)
Gerald G. Pechanek
Mihailo Stojancic
Frank Barry
Nikos Pitsianis
A High-Throughput Self-Timed FPGA Core Architecture
125(52)
Brian C. Gaide
Lizy Kurian John
The Continuation-Based Multithreading Processor: Fuce
177(20)
Masaaki Izumi
Satoshi Amamiya
Takanori Matsuzaki
Makoto Amamiya
A Study of a Processor with Dual Thread Execution Modes
197(20)
Rania Mameesh
Manoj Franklin
Measurement-Based Power Phase Analysis
217(22)
W. Lloyd Bircher
Lizy Kurian John
Visualization by Subdivision: Two Applications for Future Graphics Platforms
239(20)
Chand T. John
A Performance Analysis of Two-Level Heterogeneous Processing Systems on Wavefront Algorithms
259(22)
Darren J. Kerbyson
Adolfy Hoisie
Microarchitectural Characteristics and Implications of Alignment of Multiple Bioinformatics Sequences
281(18)
Tao Li
Towards System-Level Fault-Tolerance Using Formal Methods and SoC Methodologies
299(26)
Kristina Lundqvist
Forward Error Correction for On-Chip Interconnection Networks
325(14)
Praveen Bhojwani
Rohit Singhal
Gwan Choi
Rabi Mahapatra
Alleviating Thermal Constraints while Maintaining Performance via Silicon-Based On-Chip Optical Interconnects
339(18)
Nicholas Nelson
Gregory Briggs
Mikhail Haurylau
Guoqing Chen
Hui Chen
Eby G. Friedman
Philippe M. Fauchet
David H. Albonesi
Index 357


The University of Texas, San Antonio, Texas, USA Austin, Texas, USA