Preface |
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1. Introduction |
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1.1 Trends in Image Coding Algorithm |
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1.1.1 DCT-based block coding |
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1.1.2 DWT-based bit-plane coding |
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1.2 Trends in Video Coding Algorithm |
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1.2.1 Close-loop motion-compensated prediction |
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1.2.2 Open-loop motion-compensated temporal filtering |
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1.3 VLSI Design Consideration of Multimedia Systems |
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1.3.1 System design consideration |
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1.3.1.1 Computation analysis |
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1.3.1.2 Data access analysis |
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1.3.2 Module design consideration |
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2. Algorithm Views of Discrete Wavelet Transform |
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2.1 Basic Theoretical View of Discrete Wavelet Transform |
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2.1.1 Properties of a multi-resolution transform |
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2.1.2 The pyramid structure of discrete multi-resolution representation |
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2.1.3 The wavelet decomposition |
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2.1.4 The pyramid structure of computing wavelet transform |
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2.1.5 Inverse wavelet transform |
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2.1.6 2-D wavelet transform |
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2.2 Polyphase decomposition |
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2.3.1 Lifting steps for wavelet transform |
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2.3.2 The Euclidean algorithm |
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2.3.3 The lifting factorization algorithm |
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2.5 Classification of 1-D DWT Algorithms |
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2.6 Algorithms of 2-D DWT |
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2.7 Image Coding Using 2-D DWT |
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3. Architectures of One-Dimensional DWT |
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3.1 Convolution-Based Architectures |
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3.2 Lifting-Based Architectures |
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3.2.1 Direct implementation of lifting scheme |
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3.2.3 Design example of JPEG 2000 default (9,7) filter |
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3.2.4 Design example of integer (9,7) filter |
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3.2.5 Design example of linear (6,10) filter |
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3.3 B-Spline-Based Architectures |
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3.3.1 B-spline factorized architectures for DWT and IDWT |
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3.3.2 Implementation methods of B-spline part |
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3.3.2.1 Direct implementation of B-spline part |
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3.3.2.2 Pascal implementation of B-spline part |
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3.3.3 Design example of JPEG 2000 default (9,7) DWT filter |
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3.3.4 DWT with linear (6,10) filter |
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3.3.4.2 Detailed gate count comparison |
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3.3.5 Design example of linear (10,18) DWT filter |
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3.3.6 Design example of linear (10,18) IDWT filter |
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3.4 General Performance Analysis |
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3.4.1 Multipliers and adders |
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3.4.2 Critical path and registers |
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3.5 Wordlength Analysis in Single-Level 1-D DWT |
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3.5.1 Dynamic range analysis for single-level 1-D DWT |
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3.5.1.1 Dynamic range analysis for the output of cascaded FIR, filters |
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3.5.1.2 Dynamic range analysis for single level 1-D DWT |
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3.5.2 Round-off noise analysis basics for single level 1-D DWT |
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4 Architectures of Two-Dimensional DWT |
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4.2 Frame Memory Scan Methods |
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4.2.2 Row-column-column-row scan |
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4.2.3.1 Data flow for data buffer of size 1.5N |
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4.2.4 Complete data flow for data buffer of size (1 + (1/2)k)N |
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4.2.4.1 1-level line-based architecture |
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4.2.4.2 Multi-level line-based architecture |
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4.2.5 Non-overlapped and overlapped block-based scans |
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4.2.6 Non-overlapped and overlapped stripe-based scans |
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4.2.7 Comparison of scan methods for 1-level 2-D DWT architectures |
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4.3 Line-Based Architecture |
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4.3.1 Systolic-parallel and parallel-parallel architectures |
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4.3.3 Generic 1-level line-based architecture |
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4.3.4 Generic multi-level line-based architecture |
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4.3.4.1 Adopting two 1-D DWT modules (2DWTM) |
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4.3.4.2 Adopting three 1-D DWT modules (3DWTM) |
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4.3.5.2 JPEG 2000 default (9,7) filter |
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4.4 Line Buffer Wordlength Analysis for Line-Based 2-D DWT |
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4.4.1 Background to wordlength analysis in line-based DWT |
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4.4.2 The dynamic range analysis methodology |
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4.4.2.1 Dynamic range analysis of FIR filters |
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4.4.2.2 LL-band dynamic range analysis |
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4.4.2.3 Single level dynamic range analysis |
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4.4.2.4 The combined dynamic range analysis methodology |
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4.4.3 The round-off error analysis methodology |
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4.4.3.1 Model of round-off operations |
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4.4.3.2 Noise power model of single-level 1-D DWT |
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4.4.3.3 Noise power model of multi-level 2-D DWT |
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4.4.3.4 Noise power analysis in reconstructed image |
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4.4.3.5 Summary of round-off-error analysis |
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4.4.4 Experimental results |
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4.4.5 Summary of wordlength analysis |
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4.5 On-Chip Memory Implementation Issues |
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4.5.2 Schemes to reduce memory bandwidth |
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4.5.2.1 Reducing average memory bandwidth using parallel processing |
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4.5.2.2 Two-lifting scheme |
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4.5.3 The M-scan for multiple-lifting scheme |
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4.5.3.1 M-scan for two-lifting scheme |
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4.5.3.2 M-scan for N-lifting scheme |
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4.5.4 Experimental results |
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5. Practical Design Examples of 2-D DWT: JPEG 2000 Encoder Systems |
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5.1 Introduction to JPEG 2000 Algorithm |
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5.1.1 Coding system overview |
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5.1.2 Discrete wavelet transform |
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5.1.2.1 5-3 reversible filter |
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5.1.2.2 9-7 irreversible filter |
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5.1.3 Embedded block coding |
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5.1.4 Rate-distortion optimization |
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5.1.5 Coding efficiency of JPEG 2000 |
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5.2 Design Issues of JPEG 2000 Encoding Systems |
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5.2.1 Discrete wavelet transform |
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5.2.2 Embedded block coding |
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5.2.3 Rate-distortion optimization |
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5.3 Tile Pipelined Scheme and the Corresponding DWT Architecture |
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5.3.2 System architecture |
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5.3.3 Discrete wavelet transform |
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5.3.4 Embedded block coding |
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5.3.6 Experimental results |
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5.3.6.1 Performance and chip feature |
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5.4 Stripe Pipelined Scheme and the Corresponding DWT Architecture |
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5.4.2 System architecture |
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5.4.2.1 Stripe pipeline scheme |
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5.4.2.3 Memory requirement for LS-DWT |
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5.4.2.4 Code-block switch EBC |
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5.4.3 Experimental results |
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6. Introduction to MCTF |
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6.1 Convolution-Based MCTF |
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6.3 5/3 MCTF and 1/3 MCTF |
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6.4 Different MCTF Schemes with DWT for Video Coding |
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6.4.1 Multi-level MCTF scheme |
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6.4.2 In-band MCTF scheme |
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6.5 Pyramid MCTF with DCT for Video Coding |
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6.6 Scalable Video Coding |
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7. Introduction to Motion Estimation |
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7.1 The Concept of Motion Estimation and Compensation |
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7.2 Block Matching Algorithm |
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7.2.1 Full search algorithm |
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7.2.2 Fast full search algorithm |
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7.2.2.1 Partial distortion elimination |
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7.2.2.2 Successive elimination algorithm |
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7.2.3 Fast search algorithm |
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7.2.3.1 Simplification of matching criterion |
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7.2.3.2 Reduction on search candidates |
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7.2.3.3 Predictive search |
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7.2.3.4 Hierarchical search |
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7.3 Architecture of Motion Estimation |
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7.3.1 Architecture for full search algorithm |
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7.3.1.1 Inter-level architecture |
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7.3.1.2 Intra-level architecture |
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7.3.2 Architecture for fast full search and fast search algorithms |
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7.3.2.1 Tree-based architecture |
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7.3.2.2 Architecture for diamond search |
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7.3.2.3 Architecture for three step search |
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7.3.3 Block-level data re-use scheme |
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7.3.3.1 Redundancy access factor |
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8. Analysis and Architecture of MCTF |
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8.1 Memory Access in MCTF |
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8.1.1 Redundancy access factor for ME |
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8.1.2 Redundancy access factor for MC |
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8.2 One-Level Motion Compensated Temporal Filtering |
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8.2.1 The architecture for MCTF |
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8.2.2 Memory analysis for prediction stage |
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8.2.2.1 Direct implementation |
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8.2.2.2 Double Reference Frames (DRF) |
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8.2.2.3 Double Current Frames (DCF) |
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8.2.2.4 Modified Double Current Frames (m-DCF) |
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8.2.3 Memory analysis for update stage |
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8.2.4 Memory analysis of one-level MCTF |
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8.3 Multi-Level Motion-Compensated Temporal Filtering |
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8.3.1 The preconditions of multi-level MCTF |
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8.3.1.1 Decomposition level |
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8.3.1.2 Inter-coding for L-frames |
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8.3.2 Analysis of multi-level MCTF |
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8.3.2.1 Computational complexity |
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8.3.2.2 External memory access |
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8.3.2.3 External memory size |
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8.5 Rate-Distortion-Computation Scalability |
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8.6 Analysis of Pyramid MCTF |
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8.6.1 Computation complexity |
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8.6.3 External memory storage |
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Bibliography |
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Index |
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