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E-raamat: Multicore Technology: Architecture, Reconfiguration, and Modeling

Edited by (HITEC University, Taxila, Pakistan), Edited by (University of Essex, UK)
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"The saturation of design complexity and clock frequencies for single-core processors has resulted in the emergence of multicore architectures as an alternative design paradigm. Nowadays, multicore/multithreaded computing systems are not only a de-facto standard for high-end applications, they are also gaining popularity in the field of embedded computing. The start of the multicore era has altered the concepts relating to almost all of the areas of computer architecture design, including core design, memory management, thread scheduling, application support, inter-processor communication, debugging, and power management. This book gives readers a holistic overview of the field and guides them to further avenues of research by covering the state of the art in this area. It includes contributions from industry as well as academia"--

The saturation of design complexity and clock frequencies for single-core processors has resulted in the emergence of multicore architectures as an alternative design paradigm. Nowadays, multicore/multithreaded computing systems are not only a de-facto standard for high-end applications, they are also gaining popularity in the field of embedded computing.

The start of the multicore era has altered the concepts relating to almost all of the areas of computer architecture design, including core design, memory management, thread scheduling, application support, inter-processor communication, debugging, and power management. This book gives readers a holistic overview of the field and guides them to further avenues of research by covering the state of the art in this area. It includes contributions from industry as well as academia.

List of Figures
vii
List of Tables
xiii
Preface xv
Editors xxi
Contributors xxiii
Acronyms xxvi
I Architecture and Design Flow
1(104)
1 MORA: High-Level FPGA Programming Using a Many-Core Framework
3(38)
Wim Vanderbauwhede
Sat Rahul Chalamalasetti
Martin Margala
2 Implementing Time-Constrained Applications on a Predictable MPSoC
41(20)
Sander Stuijk
Akash Kumar
Roel Jordans
Henk Corporaal
3 SESAM: A Virtual Prototyping Solution to Design Multicore Architectures
61(44)
Nicolas Ventroux
Tanguy Sassolas
Alexandre Guerre
Caaliph Andriamisaina
II Parallelism and Optimization
105(64)
4 Verified Multicore Parallelism Using Atomic Verifiable Operations
107(46)
Michal Dobrogost
Christopher Kumar
Wolfram Kahl
5 Accelerating Critical Section Execution with Multicore Architectures
153(16)
M. Aater Suleman
Onur Mutlu
III Memory Systems
169(86)
6 TMbox: A Flexible and Reconflgurable Hybrid Transactional Memory System
171(18)
Nehir Sonmez
Oriol Areas
Osman S. Unsal
Adrian Cristal
Satnam Singh
7 EM2
189(32)
Omer Khan
Mieszko Lis
Keun Sup Shim
Myong Hyon Cho
Srinivas Devadas
8 CAFE: Cache-Aware Fair and Efficient Scheduling for CMPs
221(34)
Richard West
Puneet Zaroo
Carl A. Waldspurger
Xiao Zhang
IV Debugging
255(28)
9 Software Debugging Infrastructure for Multicore Systems-on-Chip
257(26)
Bojan Mihajlovic
Warren J. Gross
Zeljko Zilic
V Networks-on-Chip
283(126)
10 On Chip Interconnects for Multicore Architectures
285(14)
Prasun Ghosal
Soumyajit Poddar
11 Routing in Multicore NoCs
299(34)
Prasun Ghosal
Tuhin Subhra Das
12 Efficient Topologies for 3-D Networks-on-Chip
333(20)
Mohammad Ayoub Khan
Abdul Quaiyum Ansari
13 Network-on-Chip Performance Evaluation Using an Analytical Method
353(56)
Sahar Foroutan
Abbas Sheibanyrad
Frederic Petrot
Bibliography 409(42)
Index 451
Muhammad Yasir Qadri, Stephen J. Sangwine