About the Author |
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xiii | |
Preface |
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xv | |
Acknowledgements |
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xvii | |
Acronyms |
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xix | |
1 Introduction |
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1 | (22) |
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1.1 Basic Knowledge on Terrestrial Secondary Particles |
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1 | (3) |
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1.2 CMOS Semiconductor Devices and Systems |
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4 | (3) |
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1.3 Two Major Fault Modes: Charge Collection and Bipolar Action |
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7 | (5) |
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1.4 Four Hierarchies in Faulty Conditions in Electronic Systems: Fault - Error - Hazard - Failure |
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12 | (2) |
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1.5 Historical Background of Soft-Error Research |
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14 | (4) |
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1.6 General Scope of This Book |
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18 | (1) |
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18 | (5) |
2 Terrestrial Radiation Fields |
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23 | (10) |
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2.1 General Sources of Radiation |
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23 | (1) |
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2.2 Backgrounds for Selection of Terrestrial High-Energy Particles |
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23 | (2) |
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2.3 Spectra at the Avionics Altitude |
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25 | (3) |
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2.4 Radioisotopes in the Field |
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28 | (3) |
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31 | (1) |
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31 | (2) |
3 Fundamentals of Radiation Effects |
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33 | (16) |
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3.1 General Description of Radiation Effects |
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33 | (2) |
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3.2 Definition of Cross Section |
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35 | (1) |
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3.3 Radiation Effects by Photons (Gamma-ray and X-ray) |
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36 | (1) |
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3.4 Radiation Effects by Electrons (Beta-ray) |
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37 | (2) |
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3.5 Radiation Effects by Muons |
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39 | (1) |
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3.6 Radiation Effects by Protons |
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40 | (3) |
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3.7 Radiation Effects by Alpha-Particles |
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43 | (1) |
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3.8 Radiation Effects by Low-Energy Neutrons |
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43 | (2) |
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3.9 Radiation Effects by High-Energy Neutrons |
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45 | (1) |
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3.10 Radiation Effects by Heavy Ions |
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45 | (1) |
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46 | (1) |
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46 | (3) |
4 Fundamentals of Electronic Devices and Systems |
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49 | (12) |
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4.1 Fundamentals of Electronic Components |
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49 | (6) |
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4.1.1 DRAM (Dynamic Random Access Memory) |
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49 | (1) |
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49 | (2) |
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4.1.3 SRAM (Static Random Access Memory) |
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51 | (1) |
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4.1.4 Floating Gate Memory (Flash Memory) |
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51 | (2) |
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4.1.5 Sequential Logic Devices |
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53 | (1) |
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4.1.6 Combinational Logic Devices |
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54 | (1) |
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4.2 Fundamentals of Electronic Systems |
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55 | (3) |
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4.2.1 FPGA (Field Programmable Gate Array) |
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55 | (1) |
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56 | (2) |
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58 | (1) |
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58 | (3) |
5 Irradiation Test Methods for Single Event Effects |
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61 | (46) |
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61 | (3) |
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64 | (2) |
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5.3 Heavy Ion Particle Irradiation Test |
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66 | (5) |
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71 | (4) |
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75 | (3) |
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5.6 Thermal/Cold Neutron Test Methods |
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78 | (2) |
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5.7 High-Energy Neutron Test |
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80 | (14) |
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5.7.1 Medium-Energy Neutron Source by Using Radioisotopes |
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80 | (1) |
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5.7.2 Monoenergetic Neutron Test |
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80 | (4) |
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5.7.3 Quasi-Monoenergetic Neutron Test |
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84 | (6) |
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5.7.4 Spallation Neutron Test |
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90 | (2) |
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5.7.5 Attenuation of Neutron Flux and Energy |
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92 | (2) |
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5.8 Testing Conditions and Matters That Require Attention |
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94 | (2) |
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94 | (1) |
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94 | (2) |
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96 | (1) |
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96 | (11) |
6 Integrated Device Level Simulation Techniques |
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107 | (50) |
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6.1 Overall Multi-scale and Multi-physics Soft-Error Analysis System |
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107 | (5) |
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6.2 Relativistic Binary Collision and Nuclear Reaction Models |
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112 | (7) |
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6.2.1 Energy Bin Setting for a Particle Energy Spectrum |
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112 | (1) |
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6.2.2 Relativistic Binary Collision Model |
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113 | (2) |
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6.2.3 ALS (Absolute Laboratory System) and ALLS (Aligned Laboratory System) |
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115 | (4) |
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6.3 Intra-nuclear Cascade (INC) Model for High-Energy Neutrons and Protons |
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119 | (3) |
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6.3.1 Penetration of a Nucleon into a Target Nucleus |
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119 | (2) |
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6.3.2 Calculation of Probability of Binary Collision between Two Nucleons in the Target Nucleus |
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121 | (1) |
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6.3.3 Determination of Condition in Nucleon-Nucleon Collision |
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121 | (1) |
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6.4 Evaporation Model for High-Energy Neutrons and Protons |
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122 | (3) |
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6.5 Generalised Evaporation Model (GEM) for Inverse Reaction Cross Sections |
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125 | (3) |
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6.6 Neutron Capture Reaction Model |
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128 | (1) |
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6.7 Automated Device Modelling |
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129 | (2) |
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6.8 Setting of Random Position of Spallation Reaction Point in a Component |
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131 | (2) |
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6.9 Algorithms for Ion Tracking |
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133 | (2) |
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135 | (6) |
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6.11 Calculation of Cross Section |
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141 | (1) |
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6.12 Prediction for Scaling Effects of Soft Error Down to 22 nm Design Rule in SRAMs |
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142 | (2) |
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6.13 Evaluation of Effects of Heavy Elements in Semiconductor Devices by Nuclear Spallation Reaction |
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144 | (2) |
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6.14 Upper Bound Fault Simulation Model |
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146 | (1) |
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6.15 Upper Bound Fault Simulation Results |
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147 | (4) |
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147 | (1) |
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148 | (1) |
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6.15.3 Direct Ionisation by Proton |
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149 | (1) |
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149 | (2) |
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6.15.5 Low-Energy Neutron |
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151 | (1) |
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6.15.6 High-Energy Neutron Spallation |
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151 | (1) |
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6.15.7 Comparison of Secondary Cosmic Rays |
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151 | (1) |
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6.16 Upper Bound Simulation Method for SOC (System On Chip) |
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151 | (3) |
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154 | (1) |
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154 | (3) |
7 Prediction, Detection and Classification Techniques of Faults, Errors and Failures |
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157 | (50) |
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7.1 Overview of Failures in the Field |
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157 | (2) |
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7.2 Prediction and Estimation of Faulty Conditions due to SEE |
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159 | (9) |
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7.2.1 Substrate/Well/Device Level |
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159 | (3) |
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162 | (2) |
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7.2.3 Chip/Processor Level |
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164 | (2) |
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166 | (1) |
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7.2.5 Operating System Level |
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167 | (1) |
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167 | (1) |
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7.3 In-situ Detection of Faulty Conditions due to SEE |
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168 | (7) |
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7.3.1 Substrate/Well Level |
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168 | (2) |
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170 | (1) |
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170 | (1) |
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7.3.4 Chip/Processor Level |
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171 | (3) |
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7.3.5 Board/OS/Application Level |
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174 | (1) |
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7.4 Classification of Faulty Conditions |
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175 | (8) |
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7.4.1 Classification of Faults |
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175 | (1) |
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7.4.2 Classification of Errors in Time Domain |
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175 | (2) |
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7.4.3 MCU Classification Techniques of Memories in Topological Space Domain |
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177 | (6) |
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7.4.4 Classification of Errors in Sequential Logic Devices |
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183 | (1) |
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7.4.5 Classification of Failures: Chip/Board Level Partial/Full Irradiation Test |
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183 | (1) |
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7.5 Faulty Modes in Each Hierarchy |
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183 | (10) |
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183 | (3) |
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186 | (3) |
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189 | (4) |
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193 | (2) |
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195 | (12) |
8 Mitigation Techniques of Failures in Electronic Components and Systems |
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207 | (42) |
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8.1 Conventional Stack-layer Based Mitigation Techniques, Their Limitations and Improvements |
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207 | (25) |
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8.1.1 Substrate/Device Level |
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207 | (4) |
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8.1.2 Circuit/Chip/Processor Layer |
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211 | (14) |
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8.1.3 Multi-core Processor |
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225 | (2) |
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8.1.4 Board/OS/Application Level |
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227 | (2) |
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8.1.5 Real-Time Systems: Automotives and Avionics |
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229 | (1) |
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8.1.6 Limitations and Improvements |
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230 | (2) |
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8.2 Challenges for Hyper Mitigation Techniques |
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232 | (8) |
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8.2.1 Co-operation of Hardware and Software |
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232 | (1) |
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8.2.2 Mitigation of Failures under Variations in SEE Responses |
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232 | (3) |
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8.2.3 Cross-Layer Reliability (CLR) /Inter-Layer Built-In Reliability (LABIR) |
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235 | (1) |
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8.2.4 Symptom-Driven System Resilient Techniques |
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236 | (2) |
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8.2.5 Comparison of Mitigation Strategies for System Failure |
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238 | (1) |
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8.2.6 Challenges in the Near Future |
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238 | (2) |
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240 | (1) |
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240 | (9) |
9 Summary |
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249 | (2) |
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9.1 Summary of Terrestrial Radiation Effects on ULSI Devices and Electronic Systems |
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249 | (1) |
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9.2 Directions and Challenges in the Future |
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250 | (1) |
Appendices |
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251 | (8) |
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251 | (1) |
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252 | (1) |
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A.3 Why VB Is Used For Simulation? |
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253 | (1) |
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A.4 Basic Knowledge of Visual Basic |
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253 | (1) |
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A.5 Database Handling by Visual Basic and SQL |
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253 | (1) |
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A.6 Algorithms in Text Handling and Sample Codes |
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254 | (1) |
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A.7 How to Make a Self-Consistent Calculation |
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255 | (1) |
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A.8 Sample Code for Random Selection of Hit Points in a Triangle |
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256 | (3) |
Index |
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259 | |